| Message ID | 20230314063812.30450-1-alistair.francis@opensource.wdc.com |
|---|---|
| State | New |
| Headers | show |
On Tue, 14 Mar 2023 at 06:39, Alistair Francis <alistair.francis@opensource.wdc.com> wrote: > > From: Alistair Francis <alistair.francis@wdc.com> > > The following changes since commit 284c52eec2d0a1b9c47f06c3eee46762c5fc0915: > > Merge tag 'win-socket-pull-request' of https://gitlab.com/marcandre.lureau/qemu into staging (2023-03-13 13:44:17 +0000) > > are available in the Git repository at: > > https://github.com/alistair23/qemu.git tags/pull-riscv-to-apply-20230314 > > for you to fetch changes up to 0d581506de803204c5a321100afa270573382932: > > Fix incorrect register name in disassembler for fmv,fabs,fneg instructions (2023-03-14 16:36:43 +1000) > > ---------------------------------------------------------------- > Seventh RISC-V PR for 8.0 > > * Fix slli_uw decoding > * Fix incorrect register name in disassembler for fmv,fabs,fneg instructions > > ---------------------------------------------------------------- Applied, thanks. Please update the changelog at https://wiki.qemu.org/ChangeLog/8.0 for any user-visible changes. -- PMM
From: Alistair Francis <alistair.francis@wdc.com> The following changes since commit 284c52eec2d0a1b9c47f06c3eee46762c5fc0915: Merge tag 'win-socket-pull-request' of https://gitlab.com/marcandre.lureau/qemu into staging (2023-03-13 13:44:17 +0000) are available in the Git repository at: https://github.com/alistair23/qemu.git tags/pull-riscv-to-apply-20230314 for you to fetch changes up to 0d581506de803204c5a321100afa270573382932: Fix incorrect register name in disassembler for fmv,fabs,fneg instructions (2023-03-14 16:36:43 +1000) ---------------------------------------------------------------- Seventh RISC-V PR for 8.0 * Fix slli_uw decoding * Fix incorrect register name in disassembler for fmv,fabs,fneg instructions ---------------------------------------------------------------- Ivan Klokov (1): disas/riscv: Fix slli_uw decoding Mikhail Tyutin (1): Fix incorrect register name in disassembler for fmv,fabs,fneg instructions disas/riscv.c | 27 ++++++++++++++------------- 1 file changed, 14 insertions(+), 13 deletions(-)