Message ID | 20230309200550.3878088-65-richard.henderson@linaro.org |
---|---|
State | New |
Headers | show
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Series |
[PULL,v2,01/91] target/mips: Drop tcg_temp_free from micromips_translate.c.inc
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diff --git a/target/tricore/translate.c b/target/tricore/translate.c index 19cf4b6cc7..6b2065803f 100644 --- a/target/tricore/translate.c +++ b/target/tricore/translate.c @@ -3514,17 +3514,14 @@ static void decode_sr_accu(DisasContext *ctx) { uint32_t op2; uint32_t r1; - TCGv temp; r1 = MASK_OP_SR_S1D(ctx->opcode); op2 = MASK_OP_SR_OP2(ctx->opcode); switch (op2) { case OPC2_16_SR_RSUB: - /* overflow only if r1 = -0x80000000 */ - temp = tcg_const_i32(-0x80000000); - /* calc V bit */ - tcg_gen_setcond_tl(TCG_COND_EQ, cpu_PSW_V, cpu_gpr_d[r1], temp); + /* calc V bit -- overflow only if r1 = -0x80000000 */ + tcg_gen_setcondi_tl(TCG_COND_EQ, cpu_PSW_V, cpu_gpr_d[r1], -0x80000000); tcg_gen_shli_tl(cpu_PSW_V, cpu_PSW_V, 31); /* calc SV bit */ tcg_gen_or_tl(cpu_PSW_SV, cpu_PSW_SV, cpu_PSW_V);