@@ -572,8 +572,7 @@ pci_set_quad_by_mask(uint8_t *config, uint64_t mask, uint64_t reg)
pci_set_quad(config, (~mask & val) | (mask & rval));
}
-PCIDevice *pci_new_multifunction(int devfn, bool multifunction,
- const char *name);
+PCIDevice *pci_new_multifunction(int devfn, const char *name);
PCIDevice *pci_new(int devfn, const char *name);
bool pci_realize_and_unref(PCIDevice *dev, PCIBus *bus, Error **errp);
@@ -99,12 +99,12 @@ static int ehci_create_ich9_with_companions(PCIBus *bus, int slot)
return -1;
}
- ehci = pci_new_multifunction(PCI_DEVFN(slot, 7), true, name);
+ ehci = pci_new_multifunction(PCI_DEVFN(slot, 7), name);
pci_realize_and_unref(ehci, bus, &error_fatal);
usbbus = QLIST_FIRST(&ehci->qdev.child_bus);
for (i = 0; i < 3; i++) {
- uhci = pci_new_multifunction(PCI_DEVFN(slot, comp[i].func), true,
+ uhci = pci_new_multifunction(PCI_DEVFN(slot, comp[i].func),
comp[i].name);
qdev_prop_set_string(&uhci->qdev, "masterbus", usbbus->name);
qdev_prop_set_uint32(&uhci->qdev, "firstport", comp[i].port);
@@ -236,7 +236,7 @@ static void pc_q35_init(MachineState *machine)
phb = PCI_HOST_BRIDGE(q35_host);
host_bus = phb->bus;
/* create ISA bus */
- lpc = pci_new_multifunction(PCI_DEVFN(ICH9_LPC_DEV, ICH9_LPC_FUNC), true,
+ lpc = pci_new_multifunction(PCI_DEVFN(ICH9_LPC_DEV, ICH9_LPC_FUNC),
TYPE_ICH9_LPC_DEVICE);
qdev_prop_set_bit(DEVICE(lpc), "smm-enabled",
x86_machine_is_smm_enabled(x86ms));
@@ -295,7 +295,7 @@ static void mips_fuloong2e_init(MachineState *machine)
pci_bus = bonito_init((qemu_irq *)&(env->irq[2]));
/* South bridge -> IP5 */
- pci_dev = pci_new_multifunction(PCI_DEVFN(FULOONG2E_VIA_SLOT, 0), true,
+ pci_dev = pci_new_multifunction(PCI_DEVFN(FULOONG2E_VIA_SLOT, 0),
TYPE_VT82C686B_ISA);
qdev_connect_gpio_out(DEVICE(pci_dev), 0, env->irq[5]);
pci_realize_and_unref(pci_dev, pci_bus, &error_fatal);
@@ -387,14 +387,12 @@ static void sabre_realize(DeviceState *dev, Error **errp)
pci_setup_iommu(phb->bus, sabre_pci_dma_iommu, s->iommu);
/* APB secondary busses */
- pci_dev = pci_new_multifunction(PCI_DEVFN(1, 0), true,
- TYPE_SIMBA_PCI_BRIDGE);
+ pci_dev = pci_new_multifunction(PCI_DEVFN(1, 0), TYPE_SIMBA_PCI_BRIDGE);
s->bridgeB = PCI_BRIDGE(pci_dev);
pci_bridge_map_irq(s->bridgeB, "pciB", pci_simbaB_map_irq);
pci_realize_and_unref(pci_dev, phb->bus, &error_fatal);
- pci_dev = pci_new_multifunction(PCI_DEVFN(1, 1), true,
- TYPE_SIMBA_PCI_BRIDGE);
+ pci_dev = pci_new_multifunction(PCI_DEVFN(1, 1), TYPE_SIMBA_PCI_BRIDGE);
s->bridgeA = PCI_BRIDGE(pci_dev);
pci_bridge_map_irq(s->bridgeA, "pciA", pci_simbaA_map_irq);
pci_realize_and_unref(pci_dev, phb->bus, &error_fatal);
@@ -2089,8 +2089,8 @@ static void pci_qdev_realize(DeviceState *qdev, Error **errp)
pci_dev->msi_trigger = pci_msi_trigger;
}
-PCIDevice *pci_new_multifunction(int devfn, bool multifunction,
- const char *name)
+static PCIDevice *pci_new_internal(int devfn, bool multifunction,
+ const char *name)
{
DeviceState *dev;
@@ -2100,9 +2100,14 @@ PCIDevice *pci_new_multifunction(int devfn, bool multifunction,
return PCI_DEVICE(dev);
}
+PCIDevice *pci_new_multifunction(int devfn, const char *name)
+{
+ return pci_new_internal(devfn, true, name);
+}
+
PCIDevice *pci_new(int devfn, const char *name)
{
- return pci_new_multifunction(devfn, false, name);
+ return pci_new_internal(devfn, false, name);
}
bool pci_realize_and_unref(PCIDevice *dev, PCIBus *bus, Error **errp)
@@ -2113,7 +2118,7 @@ bool pci_realize_and_unref(PCIDevice *dev, PCIBus *bus, Error **errp)
PCIDevice *pci_create_simple_multifunction(PCIBus *bus, int devfn,
const char *name)
{
- PCIDevice *dev = pci_new_multifunction(devfn, true, name);
+ PCIDevice *dev = pci_new_multifunction(devfn, name);
pci_realize_and_unref(dev, bus, &error_fatal);
return dev;
}
@@ -159,8 +159,7 @@ static void pegasos2_init(MachineState *machine)
pci_bus = mv64361_get_pci_bus(pm->mv, 1);
/* VIA VT8231 South Bridge (multifunction PCI device) */
- via = OBJECT(pci_new_multifunction(PCI_DEVFN(12, 0), true,
- TYPE_VT8231_ISA));
+ via = OBJECT(pci_new_multifunction(PCI_DEVFN(12, 0), TYPE_VT8231_ISA));
qdev_connect_gpio_out(DEVICE(via), 0,
qdev_get_gpio_in_named(pm->mv, "gpp", 31));
pci_realize_and_unref(PCI_DEVICE(via), pci_bus, &error_fatal);
@@ -612,7 +612,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
pci_busA->slot_reserved_mask = 0xfffffff1;
pci_busB->slot_reserved_mask = 0xfffffff0;
- ebus = pci_new_multifunction(PCI_DEVFN(1, 0), true, TYPE_EBUS);
+ ebus = pci_new_multifunction(PCI_DEVFN(1, 0), TYPE_EBUS);
qdev_prop_set_uint64(DEVICE(ebus), "console-serial-base",
hwdef->console_serial_base);
pci_realize_and_unref(ebus, pci_busA, &error_fatal);
@@ -648,8 +648,7 @@ static void sun4uv_init(MemoryRegion *address_space_mem,
if (!nd->model || strcmp(nd->model, "sunhme") == 0) {
if (!onboard_nic) {
- pci_dev = pci_new_multifunction(PCI_DEVFN(1, 1),
- true, "sunhme");
+ pci_dev = pci_new_multifunction(PCI_DEVFN(1, 1), "sunhme");
bus = pci_busA;
memcpy(&macaddr, &nd->macaddr.a, sizeof(MACAddr));
onboard_nic = true;
There is also pci_new() which creates non-multifunction PCI devices. Accordingly the parameter is always set to true when a multi function PCI device is to be created. The reason for the parameter's existence seems to be that it is used in the internal PCI code as well which is the only location where it gets set to false. This one usage can be resolved by factoring out an internal helper function. Remove this redundant, error-prone parameter. Signed-off-by: Bernhard Beschow <shentey@gmail.com> --- include/hw/pci/pci.h | 3 +-- hw/i386/pc_q35.c | 6 +++--- hw/mips/fuloong2e.c | 2 +- hw/pci-host/sabre.c | 6 ++---- hw/pci/pci.c | 13 +++++++++---- hw/ppc/pegasos2.c | 3 +-- hw/sparc64/sun4u.c | 5 ++--- 7 files changed, 19 insertions(+), 19 deletions(-)