diff mbox series

[1/4] target/riscv/csr.c: use env_archcpu() in ctr()

Message ID 20230224174520.92490-2-dbarboza@ventanamicro.com
State New
Headers show
Series RISCVCPUConfig related cleanups | expand

Commit Message

Daniel Henrique Barboza Feb. 24, 2023, 5:45 p.m. UTC 
We don't need to use env_cpu() and CPUState().

Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
---
 target/riscv/csr.c | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

Comments

Weiwei Li Feb. 25, 2023, 6:40 a.m. UTC | #1 
On 2023/2/25 01:45, Daniel Henrique Barboza wrote:
> We don't need to use env_cpu() and CPUState().
>
> Signed-off-by: Daniel Henrique Barboza <dbarboza@ventanamicro.com>
> ---
>   target/riscv/csr.c | 3 +--
>   1 file changed, 1 insertion(+), 2 deletions(-)
>
> diff --git a/target/riscv/csr.c b/target/riscv/csr.c
> index 75a540bfcb..3692617d13 100644
> --- a/target/riscv/csr.c
> +++ b/target/riscv/csr.c
> @@ -108,8 +108,7 @@ static RISCVException vs(CPURISCVState *env, int csrno)
>   static RISCVException ctr(CPURISCVState *env, int csrno)
>   {
>   #if !defined(CONFIG_USER_ONLY)
> -    CPUState *cs = env_cpu(env);
> -    RISCVCPU *cpu = RISCV_CPU(cs);
> +    RISCVCPU *cpu = env_archcpu(env);
>       int ctr_index;
>       target_ulong ctr_mask;
>       int base_csrno = CSR_CYCLE;

This has been done by previous patchset from Bin Meng:

https://lists.nongnu.org/archive/html/qemu-riscv/2023-02/msg00276.html

Regards,

Weiwei Li
diff mbox series

Patch

diff --git a/target/riscv/csr.c b/target/riscv/csr.c
index 75a540bfcb..3692617d13 100644
--- a/target/riscv/csr.c
+++ b/target/riscv/csr.c
@@ -108,8 +108,7 @@  static RISCVException vs(CPURISCVState *env, int csrno)
 static RISCVException ctr(CPURISCVState *env, int csrno)
 {
 #if !defined(CONFIG_USER_ONLY)
-    CPUState *cs = env_cpu(env);
-    RISCVCPU *cpu = RISCV_CPU(cs);
+    RISCVCPU *cpu = env_archcpu(env);
     int ctr_index;
     target_ulong ctr_mask;
     int base_csrno = CSR_CYCLE;