| Message ID | 20230213144038.2547584-8-sunilvl@ventanamicro.com |
|---|---|
| State | New |
| Headers | show |
| Series | Add basic ACPI support for risc-v virt | expand |
On Mon, Feb 13, 2023 at 08:10:35PM +0530, Sunil V L wrote: > ACPI functions are defined in new file virt-acpi-build.c. Enable > it to be built as part of virt machine if CONFIG_ACPI is set. > > Signed-off-by: Sunil V L <sunilvl@ventanamicro.com> > Reviewed-by: Bin Meng <bmeng@tinylab.org> > --- > hw/riscv/meson.build | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/hw/riscv/meson.build b/hw/riscv/meson.build > index ab6cae57ea..2f7ee81be3 100644 > --- a/hw/riscv/meson.build > +++ b/hw/riscv/meson.build > @@ -9,5 +9,6 @@ riscv_ss.add(when: 'CONFIG_SIFIVE_E', if_true: files('sifive_e.c')) > riscv_ss.add(when: 'CONFIG_SIFIVE_U', if_true: files('sifive_u.c')) > riscv_ss.add(when: 'CONFIG_SPIKE', if_true: files('spike.c')) > riscv_ss.add(when: 'CONFIG_MICROCHIP_PFSOC', if_true: files('microchip_pfsoc.c')) > +riscv_ss.add(when: 'CONFIG_ACPI', if_true: files('virt-acpi-build.c')) > > hw_arch += {'riscv': riscv_ss} > -- > 2.34.1 > Reviewed-by: Andrew Jones <ajones@ventanamicro.com>
diff --git a/hw/riscv/meson.build b/hw/riscv/meson.build index ab6cae57ea..2f7ee81be3 100644 --- a/hw/riscv/meson.build +++ b/hw/riscv/meson.build @@ -9,5 +9,6 @@ riscv_ss.add(when: 'CONFIG_SIFIVE_E', if_true: files('sifive_e.c')) riscv_ss.add(when: 'CONFIG_SIFIVE_U', if_true: files('sifive_u.c')) riscv_ss.add(when: 'CONFIG_SPIKE', if_true: files('spike.c')) riscv_ss.add(when: 'CONFIG_MICROCHIP_PFSOC', if_true: files('microchip_pfsoc.c')) +riscv_ss.add(when: 'CONFIG_ACPI', if_true: files('virt-acpi-build.c')) hw_arch += {'riscv': riscv_ss}