From patchwork Mon Feb 13 09:36:24 2023 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Zhao Liu X-Patchwork-Id: 1741496 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@legolas.ozlabs.org Authentication-Results: legolas.ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Authentication-Results: legolas.ozlabs.org; dkim=pass (2048-bit key; unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256 header.s=Intel header.b=N3deQJEE; dkim-atps=neutral Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by legolas.ozlabs.org (Postfix) with ESMTPS id 4PFfM443kCz23yW for ; Mon, 13 Feb 2023 20:34:55 +1100 (AEDT) Received: from localhost ([::1] helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1pRVAz-00076s-N9; Mon, 13 Feb 2023 04:31:11 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pRVAA-0006mE-GG for qemu-devel@nongnu.org; Mon, 13 Feb 2023 04:30:21 -0500 Received: from mga02.intel.com ([134.134.136.20]) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1pRVA4-0006nq-36 for qemu-devel@nongnu.org; Mon, 13 Feb 2023 04:30:18 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=intel.com; i=@intel.com; q=dns/txt; s=Intel; t=1676280612; x=1707816612; h=from:to:cc:subject:date:message-id:in-reply-to: references:mime-version:content-transfer-encoding; bh=uLL+NWRhAQrmrOXrW9mrGp0p9bgRS48bvW90TKnZBAM=; b=N3deQJEE2/Qx8mmtCxg/OSci7lCeHBS7TNXY9pMUTyjrnDyCDomENlLc M7YHDz+qXyB6J07PmzeH/5BwyxmC71bUwj3C/in6Vwz2YNakZvGGueEDa GegDFCBbu3/0dLouBGA7lxBKzKfmAs+b7X+9h3vUzlHNbkti2yw1yJMbd SkfiP97YBN8BGvI9HRAPY09CBsY184SnQF1aDioWx4SREx/FVNx90+3yF 67hcumi2UwUbZTGBsQUnY/xgWAopqp7HCeZzOINzqc5hrvvgmLzUGXcqP NpySJBaqQkcoiNEYuv3fNoWp7pjNhop6UUHmyaPVRIUNgtR2zLCWuXhY2 Q==; X-IronPort-AV: E=McAfee;i="6500,9779,10619"; a="318875874" X-IronPort-AV: E=Sophos;i="5.97,293,1669104000"; d="scan'208";a="318875874" Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga101.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 13 Feb 2023 01:30:09 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6500,9779,10619"; a="792660509" X-IronPort-AV: E=Sophos;i="5.97,293,1669104000"; d="scan'208";a="792660509" Received: from liuzhao-optiplex-7080.sh.intel.com ([10.239.160.112]) by orsmga004.jf.intel.com with ESMTP; 13 Feb 2023 01:30:05 -0800 From: Zhao Liu To: Eduardo Habkost , Marcel Apfelbaum , =?utf-8?q?Philippe_Mathieu-D?= =?utf-8?q?aud=C3=A9?= , Yanan Wang , "Michael S . Tsirkin" , Richard Henderson , Paolo Bonzini , Eric Blake , Markus Armbruster Cc: qemu-devel@nongnu.org, Zhenyu Wang , Dapeng Mi , Zhuocheng Ding , Robert Hoo , Xiaoyao Li , Like Xu , Zhao Liu Subject: [PATCH RESEND 17/18] i386: Use CPUCacheInfo.share_level to encode CPUID[0x8000001D].EAX[bits 25:14] Date: Mon, 13 Feb 2023 17:36:24 +0800 Message-Id: <20230213093625.158170-18-zhao1.liu@linux.intel.com> X-Mailer: git-send-email 2.34.1 In-Reply-To: <20230213093625.158170-1-zhao1.liu@linux.intel.com> References: <20230213093625.158170-1-zhao1.liu@linux.intel.com> MIME-Version: 1.0 Received-SPF: none client-ip=134.134.136.20; envelope-from=zhao1.liu@linux.intel.com; helo=mga02.intel.com X-Spam_score_int: -42 X-Spam_score: -4.3 X-Spam_bar: ---- X-Spam_report: (-4.3 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org From: Zhao Liu CPUID[0x8000001D].EAX[bits 25:14] is used to represent the cache topology for amd CPUs. After cache models have topology information, we can use CPUCacheInfo.share_level to decide which topology level to be encoded into CPUID[0x8000001D].EAX[bits 25:14]. Signed-off-by: Zhao Liu --- target/i386/cpu.c | 10 +--------- 1 file changed, 1 insertion(+), 9 deletions(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index d691c02e3c06..5816dc99b1d4 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -355,20 +355,12 @@ static void encode_cache_cpuid8000001d(CPUCacheInfo *cache, uint32_t *eax, uint32_t *ebx, uint32_t *ecx, uint32_t *edx) { - uint32_t sharing_apic_ids; assert(cache->size == cache->line_size * cache->associativity * cache->partitions * cache->sets); *eax = CACHE_TYPE(cache->type) | CACHE_LEVEL(cache->level) | (cache->self_init ? CACHE_SELF_INIT_LEVEL : 0); - - /* L3 is shared among multiple cores */ - if (cache->level == 3) { - sharing_apic_ids = 1 << apicid_die_offset(topo_info); - } else { - sharing_apic_ids = 1 << apicid_core_offset(topo_info); - } - *eax |= (sharing_apic_ids - 1) << 14; + *eax |= max_processor_ids_for_cache(cache, topo_info) << 14; assert(cache->line_size > 0); assert(cache->partitions > 0);