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Mon, 16 Jan 2023 18:56:20 -0500 (EST) From: Peter Delevoryas To: Cc: peter@pjd.dev, clg@kaod.org, peter.maydell@linaro.org, andrew@aj.id.au, joel@jms.id.au, hskinnemoen@google.com, kfting@nuvoton.com, qemu-arm@nongnu.org, qemu-devel@nongnu.org Subject: [PATCH v2 5/5] hw/nvram/eeprom_at24c: Make reset behavior more like hardware Date: Mon, 16 Jan 2023 15:56:04 -0800 Message-Id: <20230116235604.55099-6-peter@pjd.dev> X-Mailer: git-send-email 2.39.0 In-Reply-To: <20230116235604.55099-1-peter@pjd.dev> References: <20230116235604.55099-1-peter@pjd.dev> MIME-Version: 1.0 Received-SPF: pass client-ip=64.147.123.25; envelope-from=peter@pjd.dev; helo=wout2-smtp.messagingengine.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=-0.001, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org EEPROM's are a form of non-volatile memory. After power-cycling an EEPROM, I would expect the I2C state machine to be reset to default values, but I wouldn't really expect the memory to change at all. The current implementation of the at24c EEPROM resets its internal memory on reset. This matches the specification in docs/devel/reset.rst: Cold reset is supported by every resettable object. In QEMU, it means we reset to the initial state corresponding to the start of QEMU; this might differ from what is a real hardware cold reset. It differs from other resets (like warm or bus resets) which may keep certain parts untouched. But differs from my intuition. For example, if someone writes some information to an EEPROM, then AC power cycles their board, they would expect the EEPROM to retain that information. It's very useful to be able to test things like this in QEMU as well, to verify software instrumentation like determining the cause of a reboot. Fixes: 5d8424dbd3e8 ("nvram: add AT24Cx i2c eeprom") Signed-off-by: Peter Delevoryas --- hw/nvram/eeprom_at24c.c | 22 ++++++++++------------ 1 file changed, 10 insertions(+), 12 deletions(-) diff --git a/hw/nvram/eeprom_at24c.c b/hw/nvram/eeprom_at24c.c index bb9ee75864fe..6bcded7b496c 100644 --- a/hw/nvram/eeprom_at24c.c +++ b/hw/nvram/eeprom_at24c.c @@ -185,18 +185,6 @@ static void at24c_eeprom_realize(DeviceState *dev, Error **errp) } ee->mem = g_malloc0(ee->rsize); - -} - -static -void at24c_eeprom_reset(DeviceState *state) -{ - EEPROMState *ee = AT24C_EE(state); - - ee->changed = false; - ee->cur = 0; - ee->haveaddr = 0; - memset(ee->mem, 0, ee->rsize); if (ee->blk) { @@ -214,6 +202,16 @@ void at24c_eeprom_reset(DeviceState *state) } } +static +void at24c_eeprom_reset(DeviceState *state) +{ + EEPROMState *ee = AT24C_EE(state); + + ee->changed = false; + ee->cur = 0; + ee->haveaddr = 0; +} + static Property at24c_eeprom_props[] = { DEFINE_PROP_UINT32("rom-size", EEPROMState, rsize, 0), DEFINE_PROP_BOOL("writable", EEPROMState, writable, true),