diff mbox series

[PATCH-for-8.0,1/4] cputlb: Restrict SavedIOTLB to system emulation

Message ID 20221207174129.77593-2-philmd@linaro.org
State New
Headers show
Series target/cpu: System/User cleanups around hwaddr/vaddr | expand

Commit Message

Philippe Mathieu-Daudé Dec. 7, 2022, 5:41 p.m. UTC 
Commit 2f3a57ee47 ("cputlb: ensure we save the IOTLB data in
case of reset") added the SavedIOTLB structure -- which is
system emulation specific -- in the generic CPUState structure.

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
---
 accel/tcg/cputlb.c    | 4 ++--
 include/hw/core/cpu.h | 6 ++++--
 2 files changed, 6 insertions(+), 4 deletions(-)

Comments

Alex Bennée Dec. 8, 2022, 8:40 a.m. UTC | #1 
Philippe Mathieu-Daudé <philmd@linaro.org> writes:

> Commit 2f3a57ee47 ("cputlb: ensure we save the IOTLB data in
> case of reset") added the SavedIOTLB structure -- which is
> system emulation specific -- in the generic CPUState structure.
>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
> ---
>  accel/tcg/cputlb.c    | 4 ++--
>  include/hw/core/cpu.h | 6 ++++--
>  2 files changed, 6 insertions(+), 4 deletions(-)
>
> diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
> index 6f1c00682b..0ea96fbcdf 100644
> --- a/accel/tcg/cputlb.c
> +++ b/accel/tcg/cputlb.c
> @@ -1395,7 +1395,7 @@ static uint64_t io_readx(CPUArchState *env, CPUTLBEntryFull *full,
>  static void save_iotlb_data(CPUState *cs, MemoryRegionSection *section,
>                              hwaddr mr_offset)
>  {
> -#ifdef CONFIG_PLUGIN
> +#if defined(CONFIG_PLUGIN) && !defined(CONFIG_USER_ONLY)

cputlb is softmmu only so I don't think we need to check CONFIG_USER_ONLY here.

>      SavedIOTLB *saved = &cs->saved_iotlb;
>      saved->section = section;
>      saved->mr_offset = mr_offset;
> @@ -1699,7 +1699,7 @@ tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, target_ulong addr,
>      return qemu_ram_addr_from_host_nofail(p);
>  }
>  
> -#ifdef CONFIG_PLUGIN
> +#if defined(CONFIG_PLUGIN) && !defined(CONFIG_USER_ONLY)
>  /*
>   * Perform a TLB lookup and populate the qemu_plugin_hwaddr structure.
>   * This should be a hot path as we will have just looked this path up
> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
> index 8830546121..bc3229ae13 100644
> --- a/include/hw/core/cpu.h
> +++ b/include/hw/core/cpu.h
> @@ -222,7 +222,7 @@ struct CPUWatchpoint {
>      QTAILQ_ENTRY(CPUWatchpoint) entry;
>  };
>  
> -#ifdef CONFIG_PLUGIN
> +#if defined(CONFIG_PLUGIN) && !defined(CONFIG_USER_ONLY)
>  /*
>   * For plugins we sometime need to save the resolved iotlb data before
>   * the memory regions get moved around  by io_writex.
> @@ -406,9 +406,11 @@ struct CPUState {
>  
>  #ifdef CONFIG_PLUGIN
>      GArray *plugin_mem_cbs;
> +#if !defined(CONFIG_USER_ONLY)
>      /* saved iotlb data from io_writex */
>      SavedIOTLB saved_iotlb;
> -#endif
> +#endif /* !CONFIG_USER_ONLY */
> +#endif /* CONFIG_PLUGIN */
>  
>      /* TODO Move common fields from CPUArchState here. */
>      int cpu_index;
Philippe Mathieu-Daudé Dec. 8, 2022, 10 a.m. UTC | #2 
On 8/12/22 09:40, Alex Bennée wrote:
> 
> Philippe Mathieu-Daudé <philmd@linaro.org> writes:
> 
>> Commit 2f3a57ee47 ("cputlb: ensure we save the IOTLB data in
>> case of reset") added the SavedIOTLB structure -- which is
>> system emulation specific -- in the generic CPUState structure.
>>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> ---
>>   accel/tcg/cputlb.c    | 4 ++--
>>   include/hw/core/cpu.h | 6 ++++--
>>   2 files changed, 6 insertions(+), 4 deletions(-)
>>
>> diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
>> index 6f1c00682b..0ea96fbcdf 100644
>> --- a/accel/tcg/cputlb.c
>> +++ b/accel/tcg/cputlb.c
>> @@ -1395,7 +1395,7 @@ static uint64_t io_readx(CPUArchState *env, CPUTLBEntryFull *full,
>>   static void save_iotlb_data(CPUState *cs, MemoryRegionSection *section,
>>                               hwaddr mr_offset)
>>   {
>> -#ifdef CONFIG_PLUGIN
>> +#if defined(CONFIG_PLUGIN) && !defined(CONFIG_USER_ONLY)
> 
> cputlb is softmmu only so I don't think we need to check CONFIG_USER_ONLY here.
Indeed, only "hw/core/cpu.h" requires it, thanks!
diff mbox series

Patch

diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index 6f1c00682b..0ea96fbcdf 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1395,7 +1395,7 @@  static uint64_t io_readx(CPUArchState *env, CPUTLBEntryFull *full,
 static void save_iotlb_data(CPUState *cs, MemoryRegionSection *section,
                             hwaddr mr_offset)
 {
-#ifdef CONFIG_PLUGIN
+#if defined(CONFIG_PLUGIN) && !defined(CONFIG_USER_ONLY)
     SavedIOTLB *saved = &cs->saved_iotlb;
     saved->section = section;
     saved->mr_offset = mr_offset;
@@ -1699,7 +1699,7 @@  tb_page_addr_t get_page_addr_code_hostp(CPUArchState *env, target_ulong addr,
     return qemu_ram_addr_from_host_nofail(p);
 }
 
-#ifdef CONFIG_PLUGIN
+#if defined(CONFIG_PLUGIN) && !defined(CONFIG_USER_ONLY)
 /*
  * Perform a TLB lookup and populate the qemu_plugin_hwaddr structure.
  * This should be a hot path as we will have just looked this path up
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h
index 8830546121..bc3229ae13 100644
--- a/include/hw/core/cpu.h
+++ b/include/hw/core/cpu.h
@@ -222,7 +222,7 @@  struct CPUWatchpoint {
     QTAILQ_ENTRY(CPUWatchpoint) entry;
 };
 
-#ifdef CONFIG_PLUGIN
+#if defined(CONFIG_PLUGIN) && !defined(CONFIG_USER_ONLY)
 /*
  * For plugins we sometime need to save the resolved iotlb data before
  * the memory regions get moved around  by io_writex.
@@ -406,9 +406,11 @@  struct CPUState {
 
 #ifdef CONFIG_PLUGIN
     GArray *plugin_mem_cbs;
+#if !defined(CONFIG_USER_ONLY)
     /* saved iotlb data from io_writex */
     SavedIOTLB saved_iotlb;
-#endif
+#endif /* !CONFIG_USER_ONLY */
+#endif /* CONFIG_PLUGIN */
 
     /* TODO Move common fields from CPUArchState here. */
     int cpu_index;