| Message ID | 20221125050354.3166023-1-bmeng@tinylab.org |
|---|---|
| State | New |
| Headers | show |
| Series | [v2] target/riscv: Add some comments for sstatus CSR in riscv_cpu_dump_state() | expand |
On Fri, Nov 25, 2022 at 3:05 PM Bin Meng <bmeng@tinylab.org> wrote: > > sstatus register dump is currently missing in riscv_cpu_dump_state(). > As sstatus is a copy of mstatus, which is described in the priv spec, > it seems redundant to print the same information twice. > > Add some comments for this to let people know this is intentional. > > Signed-off-by: Bin Meng <bmeng@tinylab.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > > Changes in v2: > - Add some comments for missing sstatus > > target/riscv/cpu.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index d14e95c9dc..a6c27977c5 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -382,6 +382,10 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f, int flags) > CSR_MHARTID, > CSR_MSTATUS, > CSR_MSTATUSH, > + /* > + * CSR_SSTATUS is intentionally omitted here as its value > + * can be figured out by looking at CSR_MSTATUS > + */ > CSR_HSTATUS, > CSR_VSSTATUS, > CSR_MIP, > -- > 2.34.1 > >
On Fri, Nov 25, 2022 at 3:05 PM Bin Meng <bmeng@tinylab.org> wrote: > > sstatus register dump is currently missing in riscv_cpu_dump_state(). > As sstatus is a copy of mstatus, which is described in the priv spec, > it seems redundant to print the same information twice. > > Add some comments for this to let people know this is intentional. > > Signed-off-by: Bin Meng <bmeng@tinylab.org> Thanks! Applied to riscv-to-apply.next Alistair > --- > > Changes in v2: > - Add some comments for missing sstatus > > target/riscv/cpu.c | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c > index d14e95c9dc..a6c27977c5 100644 > --- a/target/riscv/cpu.c > +++ b/target/riscv/cpu.c > @@ -382,6 +382,10 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f, int flags) > CSR_MHARTID, > CSR_MSTATUS, > CSR_MSTATUSH, > + /* > + * CSR_SSTATUS is intentionally omitted here as its value > + * can be figured out by looking at CSR_MSTATUS > + */ > CSR_HSTATUS, > CSR_VSSTATUS, > CSR_MIP, > -- > 2.34.1 > >
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index d14e95c9dc..a6c27977c5 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -382,6 +382,10 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f, int flags) CSR_MHARTID, CSR_MSTATUS, CSR_MSTATUSH, + /* + * CSR_SSTATUS is intentionally omitted here as its value + * can be figured out by looking at CSR_MSTATUS + */ CSR_HSTATUS, CSR_VSSTATUS, CSR_MIP,
sstatus register dump is currently missing in riscv_cpu_dump_state(). As sstatus is a copy of mstatus, which is described in the priv spec, it seems redundant to print the same information twice. Add some comments for this to let people know this is intentional. Signed-off-by: Bin Meng <bmeng@tinylab.org> --- Changes in v2: - Add some comments for missing sstatus target/riscv/cpu.c | 4 ++++ 1 file changed, 4 insertions(+)