diff mbox series

[v2,4/4] target/loongarch: flogb_{s/d} add set float_flag_divbyzero

Message ID 20220927064838.3570928-5-gaosong@loongson.cn
State New
Headers show
Series Fix some loongarch tcg bugs | expand

Commit Message

Song Gao Sept. 27, 2022, 6:48 a.m. UTC
if fj ==0 or fj == INT32_MIN/INT64_MIN, LoongArch host set fcsr cause exception FP_DIV0,
So we need set exception flags float_flagdivbyzero if fj ==0.

Signed-off-by: Song Gao <gaosong@loongson.cn>
---
 target/loongarch/fpu_helper.c | 14 ++++++++++++++
 1 file changed, 14 insertions(+)

Comments

Richard Henderson Sept. 28, 2022, 3:24 p.m. UTC | #1
On 9/26/22 23:48, Song Gao wrote:
> if fj ==0 or fj == INT32_MIN/INT64_MIN, LoongArch host set fcsr cause exception FP_DIV0,
> So we need set exception flags float_flagdivbyzero if fj ==0.

You are correct that ieee754 says that logB(0) should raise divbyzero.
This should be fixed in softfloat-parts.c.inc, not here, within

         case float_class_zero:

             /* log2(0) = -inf */

             a->cls = float_class_inf;

             a->sign = 1;

             return;



r~
Song Gao Sept. 29, 2022, 7:27 a.m. UTC | #2
在 2022/9/28 下午11:24, Richard Henderson 写道:
> On 9/26/22 23:48, Song Gao wrote:
>> if fj ==0 or fj == INT32_MIN/INT64_MIN, LoongArch host set fcsr cause 
>> exception FP_DIV0,
>> So we need set exception flags float_flagdivbyzero if fj ==0.
>
> You are correct that ieee754 says that logB(0) should raise divbyzero.
> This should be fixed in softfloat-parts.c.inc, not here, within
>
>         case float_class_zero:
>
>             /* log2(0) = -inf */
>
>             a->cls = float_class_inf;
>
>             a->sign = 1;
>
>             return;
>
>
Ok , I will correct it on v3.

Thanks.
Song Gao
>
> r~
diff mbox series

Patch

diff --git a/target/loongarch/fpu_helper.c b/target/loongarch/fpu_helper.c
index 1a24667eaf..d40e608bb4 100644
--- a/target/loongarch/fpu_helper.c
+++ b/target/loongarch/fpu_helper.c
@@ -322,6 +322,13 @@  uint64_t helper_flogb_s(CPULoongArchState *env, uint64_t fj)
     fp = float32_log2((uint32_t)fj, status);
     fd = nanbox_s(float32_round_to_int(fp, status));
     set_float_rounding_mode(old_mode, status);
+    /*
+     * LoongArch host if fj == 0 or INT32_MIN , set the fcsr cause FP_DIV0
+     * so we need set exception flags float_flag_divbyzero.
+     */
+    if (((uint32_t)fj == 0) | ((uint32_t)fj == INT32_MIN)) {
+        set_float_exception_flags(float_flag_divbyzero, status);
+    }
     update_fcsr0_mask(env, GETPC(), float_flag_inexact);
     return fd;
 }
@@ -336,6 +343,13 @@  uint64_t helper_flogb_d(CPULoongArchState *env, uint64_t fj)
     fd = float64_log2(fj, status);
     fd = float64_round_to_int(fd, status);
     set_float_rounding_mode(old_mode, status);
+    /*
+     * LoongArch host if fj == 0 or INT64_MIN , set the fcsr cause FP_DIV0
+     * so we need set exception flags float_flag_divbyzero.
+     */
+    if ((fj == 0) | (fj == INT64_MIN)) {
+        set_float_exception_flags(float_flag_divbyzero, status);
+    }
     update_fcsr0_mask(env, GETPC(), float_flag_inexact);
     return fd;
 }