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[201.43.216.47]) by smtp.gmail.com with ESMTPSA id 2-20020a1f1602000000b0037613541b27sm12277919vkw.39.2022.08.10.03.06.04 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Wed, 10 Aug 2022 03:06:06 -0700 (PDT) From: Daniel Henrique Barboza To: qemu-devel@nongnu.org Cc: qemu-ppc@nongnu.org, clg@kaod.org, fbarrat@linux.ibm.com, Daniel Henrique Barboza Subject: [PATCH for-7.2 v3 11/11] ppc/pnv: fix QOM parenting of user creatable root ports Date: Wed, 10 Aug 2022 07:05:36 -0300 Message-Id: <20220810100536.473859-12-danielhb413@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220810100536.473859-1-danielhb413@gmail.com> References: <20220810100536.473859-1-danielhb413@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2607:f8b0:4864:20::934; envelope-from=danielhb413@gmail.com; helo=mail-ua1-x934.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_ENVFROM_END_DIGIT=0.25, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" User creatable root ports are being parented by the 'peripheral' or the 'peripheral-anon' container. This happens because this is the regular QOM schema for sysbus devices that are added via the command line. Let's make this QOM hierarchy similar to what we have with default root ports, i.e. the root port must be parented by the pnv-root-bus. To do that we change the qom and bus parent of the root port during root_port_realize(). The realize() is shared by the default root port code path, so we can remove the code inside pnv_phb_attach_root_port() that was adding the root port as a child of the bus as well. While we're at it, change pnv_phb_attach_root_port() to receive a PCIBus instead of a PCIHostState to make it clear that the function does not make use of the PHB. Signed-off-by: Daniel Henrique Barboza --- hw/pci-host/pnv_phb.c | 36 ++++++++++++++++-------------------- 1 file changed, 16 insertions(+), 20 deletions(-) diff --git a/hw/pci-host/pnv_phb.c b/hw/pci-host/pnv_phb.c index feaef8137f..09cea12091 100644 --- a/hw/pci-host/pnv_phb.c +++ b/hw/pci-host/pnv_phb.c @@ -91,27 +91,11 @@ static PnvPhb4PecState *pnv_phb4_get_pec(PnvChip *chip, PnvPHB4 *phb, return NULL; } -/* - * Attach a root port device. - * - * 'index' will be used both as a PCIE slot value and to calculate - * QOM id. 'chip_id' is going to be used as PCIE chassis for the - * root port. - */ -static void pnv_phb_attach_root_port(PCIHostState *pci) +static void pnv_phb_attach_root_port(PCIBus *bus) { PCIDevice *root = pci_new(PCI_DEVFN(0, 0), TYPE_PNV_PHB_ROOT_PORT); - const char *dev_id = DEVICE(root)->id; - g_autofree char *default_id = NULL; - int index; - index = object_property_get_int(OBJECT(pci->bus), "phb-id", &error_fatal); - default_id = g_strdup_printf("%s[%d]", TYPE_PNV_PHB_ROOT_PORT, index); - - object_property_add_child(OBJECT(pci->bus), dev_id ? dev_id : default_id, - OBJECT(root)); - - pci_realize_and_unref(root, pci->bus, &error_fatal); + pci_realize_and_unref(root, bus, &error_fatal); } /* @@ -228,7 +212,7 @@ static void pnv_phb_realize(DeviceState *dev, Error **errp) return; } - pnv_phb_attach_root_port(pci); + pnv_phb_attach_root_port(pci->bus); } static const char *pnv_phb_root_bus_path(PCIHostState *host_bridge, @@ -297,12 +281,19 @@ static void pnv_phb_root_port_realize(DeviceState *dev, Error **errp) { PCIERootPortClass *rpc = PCIE_ROOT_PORT_GET_CLASS(dev); PnvPHBRootPort *phb_rp = PNV_PHB_ROOT_PORT(dev); - PCIBus *bus = PCI_BUS(qdev_get_parent_bus(dev)); + BusState *qbus = qdev_get_parent_bus(dev); + PCIBus *bus = PCI_BUS(qbus); PCIDevice *pci = PCI_DEVICE(dev); uint16_t device_id = 0; Error *local_err = NULL; int chip_id, index; + + /* + * 'index' will be used both as a PCIE slot value and to calculate + * QOM id. 'chip_id' is going to be used as PCIE chassis for the + * root port. + */ chip_id = object_property_get_int(OBJECT(bus), "chip-id", &error_fatal); index = object_property_get_int(OBJECT(bus), "phb-id", &error_fatal); @@ -310,6 +301,11 @@ static void pnv_phb_root_port_realize(DeviceState *dev, Error **errp) qdev_prop_set_uint8(dev, "chassis", chip_id); qdev_prop_set_uint16(dev, "slot", index); + pnv_parent_qom_fixup(OBJECT(bus), OBJECT(dev), index); + if (!qdev_set_parent_bus(dev, qbus, &error_fatal)) { + return; + } + rpc->parent_realize(dev, &local_err); if (local_err) { error_propagate(errp, local_err);