| Message ID | 20220713165449.37433-3-ben.dooks@sifive.com |
|---|---|
| State | New |
| Headers | show |
| Series | [1/7] pci: designware: add 64-bit viewport limit | expand |
diff --git a/hw/pci-host/designware.c b/hw/pci-host/designware.c index 296f1b9760..d213d7324c 100644 --- a/hw/pci-host/designware.c +++ b/hw/pci-host/designware.c @@ -365,7 +365,7 @@ static void designware_pcie_root_config_write(PCIDevice *d, uint32_t address, case DESIGNWARE_PCIE_ATU_UPPER_TARGET: viewport->target &= 0x00000000FFFFFFFFULL; - viewport->target |= val; + viewport->target |= (uint64_t)val << 32; break; case DESIGNWARE_PCIE_ATU_UPPER_LIMIT:
By inspection DESIGNWARE_PCIE_ATU_UPPER_TARGET should be writing to the upper 32-bits of viewport->target, so fix this by shifting the 32-bit value before the or. Signed-off-by: Ben Dooks <ben.dooks@sifive.com> --- hw/pci-host/designware.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)