diff mbox series

[v2,07/11] target/openrisc: Add interrupted CPU to log

Message ID 20220703212823.10067-8-shorne@gmail.com
State New
Headers show
Series OpenRISC Virtual Machine | expand

Commit Message

Stafford Horne July 3, 2022, 9:28 p.m. UTC
When we are tracing it's helpful to know which CPU's are getting
interrupted, att that detail to the log line.

Signed-off-by: Stafford Horne <shorne@gmail.com>
---
 target/openrisc/interrupt.c | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

Comments

Richard Henderson July 4, 2022, 10:04 a.m. UTC | #1
On 7/4/22 02:58, Stafford Horne wrote:
> When we are tracing it's helpful to know which CPU's are getting
> interrupted, att that detail to the log line.

"at".

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


> 
> Signed-off-by: Stafford Horne <shorne@gmail.com>
> ---
>   target/openrisc/interrupt.c | 4 +++-
>   1 file changed, 3 insertions(+), 1 deletion(-)
> 
> diff --git a/target/openrisc/interrupt.c b/target/openrisc/interrupt.c
> index e5724f5371..c31c6f12c4 100644
> --- a/target/openrisc/interrupt.c
> +++ b/target/openrisc/interrupt.c
> @@ -83,7 +83,9 @@ void openrisc_cpu_do_interrupt(CPUState *cs)
>               [EXCP_TRAP]     = "TRAP",
>           };
>   
> -        qemu_log_mask(CPU_LOG_INT, "INT: %s\n", int_name[exception]);
> +        qemu_log_mask(CPU_LOG_INT, "CPU: %d INT: %s\n",
> +                      cs->cpu_index,
> +                      int_name[exception]);
>   
>           hwaddr vect_pc = exception << 8;
>           if (env->cpucfgr & CPUCFGR_EVBARP) {
Stafford Horne July 4, 2022, 8:26 p.m. UTC | #2
On Mon, Jul 04, 2022 at 03:34:52PM +0530, Richard Henderson wrote:
> On 7/4/22 02:58, Stafford Horne wrote:
> > When we are tracing it's helpful to know which CPU's are getting
> > interrupted, att that detail to the log line.
> 
> "at".
> 
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

Actually it should be "add", thanks I fixed it.

-Stafford
diff mbox series

Patch

diff --git a/target/openrisc/interrupt.c b/target/openrisc/interrupt.c
index e5724f5371..c31c6f12c4 100644
--- a/target/openrisc/interrupt.c
+++ b/target/openrisc/interrupt.c
@@ -83,7 +83,9 @@  void openrisc_cpu_do_interrupt(CPUState *cs)
             [EXCP_TRAP]     = "TRAP",
         };
 
-        qemu_log_mask(CPU_LOG_INT, "INT: %s\n", int_name[exception]);
+        qemu_log_mask(CPU_LOG_INT, "CPU: %d INT: %s\n",
+                      cs->cpu_index,
+                      int_name[exception]);
 
         hwaddr vect_pc = exception << 8;
         if (env->cpucfgr & CPUCFGR_EVBARP) {