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[217.237.121.196]) by smtp.gmail.com with ESMTPSA id a21-20020a05600c069500b003942a244ed7sm5341022wmn.28.2022.05.28.12.21.21 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sat, 28 May 2022 12:21:22 -0700 (PDT) From: Bernhard Beschow To: qemu-devel@nongnu.org Cc: qemu-trivial@nongnu.org, Bernhard Beschow , Mark Cave-Ayland , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= , "Michael S. Tsirkin" , Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , Eduardo Habkost , =?utf-8?q?Herv=C3=A9_Poussineau?= , Aurelien Jarno Subject: [PATCH v3 5/7] hw/isa/piix{3, 4}: Factor out ISABus retrieval from create() functions Date: Sat, 28 May 2022 21:20:54 +0200 Message-Id: <20220528192057.30910-6-shentey@gmail.com> X-Mailer: git-send-email 2.36.1 In-Reply-To: <20220528192057.30910-1-shentey@gmail.com> References: <20220528192057.30910-1-shentey@gmail.com> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::32a; envelope-from=shentey@gmail.com; helo=mail-wm1-x32a.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FROM=0.001, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, T_SCC_BODY_TEXT_LINE=-0.01 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Modernizes the code and even saves a few lines. Signed-off-by: Bernhard Beschow Reviewed-by: Mark Cave-Ayland Reviewed-by: Philippe Mathieu-Daudé --- hw/i386/pc_piix.c | 3 ++- hw/isa/piix3.c | 3 +-- hw/isa/piix4.c | 6 +----- hw/mips/malta.c | 3 ++- include/hw/southbridge/piix.h | 4 ++-- 5 files changed, 8 insertions(+), 11 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 4120fd52e5..9d2076a7ca 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -207,9 +207,10 @@ static void pc_init1(MachineState *machine, pci_memory, ram_memory); pcms->bus = pci_bus; - piix3 = piix3_create(pci_bus, &isa_bus); + piix3 = piix3_create(pci_bus); piix3->pic = x86ms->gsi; piix3_devfn = piix3->dev.devfn; + isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0")); } else { pci_bus = NULL; i440fx_state = NULL; diff --git a/hw/isa/piix3.c b/hw/isa/piix3.c index de532cc692..c6ff7795f4 100644 --- a/hw/isa/piix3.c +++ b/hw/isa/piix3.c @@ -400,7 +400,7 @@ static void piix3_register_types(void) type_init(piix3_register_types) -PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus) +PIIX3State *piix3_create(PCIBus *pci_bus) { PIIX3State *piix3; PCIDevice *pci_dev; @@ -409,7 +409,6 @@ PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus) pci_dev = pci_create_simple_multifunction(pci_bus, -1, true, type); piix3 = PIIX3_PCI_DEVICE(pci_dev); - *isa_bus = ISA_BUS(qdev_get_child_bus(DEVICE(piix3), "isa.0")); return piix3; } diff --git a/hw/isa/piix4.c b/hw/isa/piix4.c index 058bebb5e2..96df21a610 100644 --- a/hw/isa/piix4.c +++ b/hw/isa/piix4.c @@ -312,7 +312,7 @@ static void piix4_register_types(void) type_init(piix4_register_types) -DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus) +DeviceState *piix4_create(PCIBus *pci_bus, I2CBus **smbus) { PCIDevice *pci; DeviceState *dev; @@ -322,10 +322,6 @@ DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus) TYPE_PIIX4_PCI_DEVICE); dev = DEVICE(pci); - if (isa_bus) { - *isa_bus = ISA_BUS(qdev_get_child_bus(dev, "isa.0")); - } - if (smbus) { pci = pci_new(devfn + 3, TYPE_PIIX4_PM); qdev_prop_set_uint32(DEVICE(pci), "smb_io_base", 0x1100); diff --git a/hw/mips/malta.c b/hw/mips/malta.c index 9ffdc5b8f1..e446b25ad0 100644 --- a/hw/mips/malta.c +++ b/hw/mips/malta.c @@ -1399,7 +1399,8 @@ void mips_malta_init(MachineState *machine) empty_slot_init("GT64120", 0, 0x20000000); /* Southbridge */ - dev = piix4_create(pci_bus, &isa_bus, &smbus); + dev = piix4_create(pci_bus, &smbus); + isa_bus = ISA_BUS(qdev_get_child_bus(dev, "isa.0")); /* Interrupt controller */ qdev_connect_gpio_out_named(dev, "intr", 0, i8259_irq); diff --git a/include/hw/southbridge/piix.h b/include/hw/southbridge/piix.h index 3b97186f75..0a2ef0c7b6 100644 --- a/include/hw/southbridge/piix.h +++ b/include/hw/southbridge/piix.h @@ -68,8 +68,8 @@ DECLARE_INSTANCE_CHECKER(PIIX3State, PIIX3_PCI_DEVICE, #define TYPE_PIIX3_XEN_DEVICE "PIIX3-xen" #define TYPE_PIIX4_PCI_DEVICE "piix4-isa" -PIIX3State *piix3_create(PCIBus *pci_bus, ISABus **isa_bus); +PIIX3State *piix3_create(PCIBus *pci_bus); -DeviceState *piix4_create(PCIBus *pci_bus, ISABus **isa_bus, I2CBus **smbus); +DeviceState *piix4_create(PCIBus *pci_bus, I2CBus **smbus); #endif