diff mbox series

hw/xtensa: fix reset value of MIROUT register of MX PIC

Message ID 20220426162858.1114691-1-jcmvbkbc@gmail.com
State New
Headers show
Series hw/xtensa: fix reset value of MIROUT register of MX PIC | expand

Commit Message

Max Filippov April 26, 2022, 4:28 p.m. UTC 
MX PIC comes out of reset with IRQ routing registers set to 0, thus
not delivering any external IRQ to any connected CPU by default.
Fix the model to match the hardware.

Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
---
 hw/xtensa/mx_pic.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/hw/xtensa/mx_pic.c b/hw/xtensa/mx_pic.c
index d889f953d17e..8211c993eb74 100644
--- a/hw/xtensa/mx_pic.c
+++ b/hw/xtensa/mx_pic.c
@@ -334,7 +334,7 @@  void xtensa_mx_pic_reset(void *opaque)
     mx->miasg = 0;
     mx->mipipart = 0;
     for (i = 0; i < mx->n_irq; ++i) {
-        mx->mirout[i] = 1;
+        mx->mirout[i] = 0;
     }
     for (i = 0; i < mx->n_cpu; ++i) {
         mx->cpu[i].mipicause = 0;