diff mbox series

[PULL,v2,04/31] target/riscv: Add the privileged spec version 1.12.0

Message ID 20220422003656.1648121-5-alistair.francis@opensource.wdc.com
State New
Headers show
Series [PULL,v2,01/31] hw/ssi: Add Ibex SPI device model | expand

Commit Message

Alistair Francis April 22, 2022, 12:36 a.m. UTC 
From: Atish Patra <atishp@rivosinc.com>

Add the definition for ratified privileged specification version v1.12

Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Atish Patra <atishp@rivosinc.com>
Message-Id: <20220303185440.512391-3-atishp@rivosinc.com>
Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
---
 target/riscv/cpu.h | 1 +
 1 file changed, 1 insertion(+)
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Patch

diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h
index 345ec2c773..19c3b6610b 100644
--- a/target/riscv/cpu.h
+++ b/target/riscv/cpu.h
@@ -86,6 +86,7 @@  enum {
 enum {
     PRIV_VERSION_1_10_0 = 0,
     PRIV_VERSION_1_11_0,
+    PRIV_VERSION_1_12_0,
 };
 
 #define VEXT_VERSION_1_00_0 0x00010000