diff mbox series

[2/2] vmxcap: Add 5-level EPT bit

Message ID 20220221145316.576138-2-vkuznets@redhat.com
State New
Headers show
Series [1/2] i386: Add Icelake-Server-v6 CPU model with 5-level EPT support | expand

Commit Message

Vitaly Kuznetsov Feb. 21, 2022, 2:53 p.m. UTC 
5-level EPT is present in Icelake Server CPUs and is supported by QEMU
('vmx-page-walk-5').

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
---
 scripts/kvm/vmxcap | 1 +
 1 file changed, 1 insertion(+)

Comments

Paolo Bonzini Feb. 23, 2022, 9:47 a.m. UTC | #1 
On 2/21/22 15:53, Vitaly Kuznetsov wrote:
> 5-level EPT is present in Icelake Server CPUs and is supported by QEMU
> ('vmx-page-walk-5').
> 
> Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
> ---
>   scripts/kvm/vmxcap | 1 +
>   1 file changed, 1 insertion(+)
> 
> diff --git a/scripts/kvm/vmxcap b/scripts/kvm/vmxcap
> index 6fe66d5f5753..f140040104bf 100755
> --- a/scripts/kvm/vmxcap
> +++ b/scripts/kvm/vmxcap
> @@ -249,6 +249,7 @@ controls = [
>           bits = {
>               0: 'Execute-only EPT translations',
>               6: 'Page-walk length 4',
> +            7: 'Page-walk length 5',
>               8: 'Paging-structure memory type UC',
>               14: 'Paging-structure memory type WB',
>               16: '2MB EPT pages',

Queued both, thanks.

Paolo
diff mbox series

Patch

diff --git a/scripts/kvm/vmxcap b/scripts/kvm/vmxcap
index 6fe66d5f5753..f140040104bf 100755
--- a/scripts/kvm/vmxcap
+++ b/scripts/kvm/vmxcap
@@ -249,6 +249,7 @@  controls = [
         bits = {
             0: 'Execute-only EPT translations',
             6: 'Page-walk length 4',
+            7: 'Page-walk length 5',
             8: 'Paging-structure memory type UC',
             14: 'Paging-structure memory type WB',
             16: '2MB EPT pages',