diff mbox series

[v2,04/12] Hexagon (target/hexagon) properly handle SNaN in dfmin/dfmax/sfmin/sfmax

Message ID 20220210021556.9217-5-tsimpson@quicinc.com
State New
Headers show
Series Hexagon bug fixes and additional tests | expand

Commit Message

Taylor Simpson Feb. 10, 2022, 2:15 a.m. UTC 
The float??_minnum implementation differs from Hexagon for SNaN,
it returns NaN, but Hexagon returns the other input.  So, we add
checks for NaN before calling it.

test cases added in a subsequent patch to more extensively test USR bits

Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>
---
 target/hexagon/op_helper.c | 54 +++++++++++++++++++++++++++++++++-----
 1 file changed, 48 insertions(+), 6 deletions(-)

Comments

Richard Henderson Feb. 11, 2022, 12:51 a.m. UTC | #1 
On 2/10/22 13:15, Taylor Simpson wrote:
> The float??_minnum implementation differs from Hexagon for SNaN,
> it returns NaN, but Hexagon returns the other input.  So, we add
> checks for NaN before calling it.
> 
> test cases added in a subsequent patch to more extensively test USR bits
> 
> Signed-off-by: Taylor Simpson <tsimpson@quicinc.com>

This appears to be the same as the IEEE 754-2019 minimumNumber (as opposed to the earlier 
754-2008 minNum), which a recent RISC-V revision adopted.  We added support for that 
directly in softfloat: float32_minimum_number et al.


r~
diff mbox series

Patch

diff --git a/target/hexagon/op_helper.c b/target/hexagon/op_helper.c
index 75dc0f23f0..7f40e09486 100644
--- a/target/hexagon/op_helper.c
+++ b/target/hexagon/op_helper.c
@@ -947,7 +947,17 @@  float32 HELPER(sfmax)(CPUHexagonState *env, float32 RsV, float32 RtV)
 {
     float32 RdV;
     arch_fpop_start(env);
-    RdV = float32_maxnum(RsV, RtV, &env->fp_status);
+    if (float32_is_signaling_nan(RsV, &env->fp_status) &&
+        !float32_is_any_nan(RtV)) {
+        RdV = RtV;
+        float_raise(float_flag_invalid, &env->fp_status);
+    } else if (!float32_is_any_nan(RsV) &&
+               float32_is_signaling_nan(RtV, &env->fp_status)) {
+        RdV = RsV;
+        float_raise(float_flag_invalid, &env->fp_status);
+    } else {
+        RdV = float32_maxnum(RsV, RtV, &env->fp_status);
+    }
     arch_fpop_end(env);
     return RdV;
 }
@@ -956,7 +966,17 @@  float32 HELPER(sfmin)(CPUHexagonState *env, float32 RsV, float32 RtV)
 {
     float32 RdV;
     arch_fpop_start(env);
-    RdV = float32_minnum(RsV, RtV, &env->fp_status);
+    if (float32_is_signaling_nan(RsV, &env->fp_status) &&
+        !float32_is_any_nan(RtV)) {
+        RdV = RtV;
+        float_raise(float_flag_invalid, &env->fp_status);
+    } else if (!float32_is_any_nan(RsV) &&
+               float32_is_signaling_nan(RtV, &env->fp_status)) {
+        RdV = RsV;
+        float_raise(float_flag_invalid, &env->fp_status);
+    } else {
+        RdV = float32_minnum(RsV, RtV, &env->fp_status);
+    }
     arch_fpop_end(env);
     return RdV;
 }
@@ -1040,9 +1060,20 @@  float64 HELPER(dfmax)(CPUHexagonState *env, float64 RssV, float64 RttV)
 {
     float64 RddV;
     arch_fpop_start(env);
-    RddV = float64_maxnum(RssV, RttV, &env->fp_status);
-    if (float64_is_any_nan(RssV) || float64_is_any_nan(RttV)) {
+    if (float64_is_signaling_nan(RssV, &env->fp_status) &&
+        !float64_is_any_nan(RttV)) {
+        RddV = RttV;
         float_raise(float_flag_invalid, &env->fp_status);
+    } else if (!float64_is_any_nan(RssV) &&
+               float64_is_signaling_nan(RttV, &env->fp_status)) {
+        RddV = RssV;
+        float_raise(float_flag_invalid, &env->fp_status);
+    } else {
+        RddV = float64_maxnum(RssV, RttV, &env->fp_status);
+        if (float64_is_quiet_nan(RssV, &env->fp_status) ||
+            float64_is_quiet_nan(RttV, &env->fp_status)) {
+            float_raise(float_flag_invalid, &env->fp_status);
+        }
     }
     arch_fpop_end(env);
     return RddV;
@@ -1052,9 +1083,20 @@  float64 HELPER(dfmin)(CPUHexagonState *env, float64 RssV, float64 RttV)
 {
     float64 RddV;
     arch_fpop_start(env);
-    RddV = float64_minnum(RssV, RttV, &env->fp_status);
-    if (float64_is_any_nan(RssV) || float64_is_any_nan(RttV)) {
+    if (float64_is_signaling_nan(RssV, &env->fp_status) &&
+        !float64_is_any_nan(RttV)) {
+        RddV = RttV;
         float_raise(float_flag_invalid, &env->fp_status);
+    } else if (!float64_is_any_nan(RssV) &&
+               float64_is_signaling_nan(RttV, &env->fp_status)) {
+        RddV = RssV;
+        float_raise(float_flag_invalid, &env->fp_status);
+    } else {
+        RddV = float64_minnum(RssV, RttV, &env->fp_status);
+        if (float64_is_quiet_nan(RssV, &env->fp_status) ||
+            float64_is_quiet_nan(RttV, &env->fp_status)) {
+            float_raise(float_flag_invalid, &env->fp_status);
+        }
     }
     arch_fpop_end(env);
     return RddV;