From patchwork Fri Jan 7 18:56:34 2022 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: "Matheus K. Ferst" X-Patchwork-Id: 1576870 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by bilbo.ozlabs.org (Postfix) with ESMTPS id 4JVv7b45Rkz9s1l for ; Sat, 8 Jan 2022 06:54:35 +1100 (AEDT) Received: from localhost ([::1]:37872 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n5vJp-0007Ay-Ag for incoming@patchwork.ozlabs.org; Fri, 07 Jan 2022 14:54:33 -0500 Received: from eggs.gnu.org ([209.51.188.92]:40518) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1n5uT2-0003gJ-Jq; Fri, 07 Jan 2022 14:00:00 -0500 Received: from [201.28.113.2] (port=57882 helo=outlook.eldorado.org.br) by eggs.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1n5uT0-0007kV-Vn; Fri, 07 Jan 2022 14:00:00 -0500 Received: from p9ibm ([10.10.71.235]) by outlook.eldorado.org.br over TLS secured channel with Microsoft SMTPSVC(8.5.9600.16384); Fri, 7 Jan 2022 15:57:41 -0300 Received: from eldorado.org.br (unknown [10.10.70.45]) by p9ibm (Postfix) with ESMTP id 874818001D1; Fri, 7 Jan 2022 15:57:41 -0300 (-03) From: matheus.ferst@eldorado.org.br To: qemu-devel@nongnu.org, qemu-ppc@nongnu.org Subject: [PATCH 18/37] target/ppc: implement vgnb Date: Fri, 7 Jan 2022 15:56:34 -0300 Message-Id: <20220107185653.1609775-19-matheus.ferst@eldorado.org.br> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20220107185653.1609775-1-matheus.ferst@eldorado.org.br> References: <20220107185653.1609775-1-matheus.ferst@eldorado.org.br> MIME-Version: 1.0 X-OriginalArrivalTime: 07 Jan 2022 18:57:41.0899 (UTC) FILETIME=[72B9EDB0:01D803F8] X-Host-Lookup-Failed: Reverse DNS lookup failed for 201.28.113.2 (failed) Received-SPF: pass client-ip=201.28.113.2; envelope-from=matheus.ferst@eldorado.org.br; helo=outlook.eldorado.org.br X-Spam_score_int: -10 X-Spam_score: -1.1 X-Spam_bar: - X-Spam_report: (-1.1 / 5.0 requ) BAYES_00=-1.9, RDNS_NONE=0.793, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: danielhb413@gmail.com, richard.henderson@linaro.org, groug@kaod.org, clg@kaod.org, Matheus Ferst , david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Matheus Ferst Signed-off-by: Matheus Ferst --- target/ppc/insn32.decode | 5 ++++ target/ppc/translate/vmx-impl.c.inc | 44 +++++++++++++++++++++++++++++ 2 files changed, 49 insertions(+) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index a674e06727..15f4dafe5d 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -66,6 +66,9 @@ &VX_mp rt mp:bool vrb @VX_mp ...... rt:5 .... mp:1 vrb:5 ........... &VX_mp +&VX_n rt vrb n +@VX_n ...... rt:5 .. n:3 vrb:5 ........... &VX_n + &VX_tb_rc vrt vrb rc:bool @VX_tb_rc ...... vrt:5 ..... vrb:5 rc:1 .......... &VX_tb_rc @@ -418,6 +421,8 @@ VCMPUQ 000100 ... -- ..... ..... 00100000001 @VX_bf ## Vector Bit Manipulation Instruction +VGNB 000100 ..... -- ... ..... 10011001100 @VX_n + VCFUGED 000100 ..... ..... ..... 10101001101 @VX VCLZDM 000100 ..... ..... ..... 11110000100 @VX VCTZDM 000100 ..... ..... ..... 11111000100 @VX diff --git a/target/ppc/translate/vmx-impl.c.inc b/target/ppc/translate/vmx-impl.c.inc index 78b277466a..43eb7ab70c 100644 --- a/target/ppc/translate/vmx-impl.c.inc +++ b/target/ppc/translate/vmx-impl.c.inc @@ -1438,6 +1438,50 @@ GEN_VXFORM_DUAL(vsplth, PPC_ALTIVEC, PPC_NONE, GEN_VXFORM_DUAL(vspltw, PPC_ALTIVEC, PPC_NONE, vextractuw, PPC_NONE, PPC2_ISA300); +static bool trans_VGNB(DisasContext *ctx, arg_VX_n *a) +{ + TCGv_i64 vrb, tmp, rt; + int in = 63, out = 63; + + REQUIRE_INSNS_FLAGS2(ctx, ISA310); + REQUIRE_VECTOR(ctx); + + if (a->n < 2) { + /* + * "N can be any value between 2 and 7, inclusive." Otherwise, the + * result is undefined, so we don't need to change RT. Also, N > 7 is + * impossible since the immediate field is 3 bits only. + */ + return true; + } + + vrb = tcg_temp_new_i64(); + tmp = tcg_temp_new_i64(); + rt = tcg_const_i64(0); + + for (int dw = 1; dw >= 0; dw--) { + get_avr64(vrb, a->vrb, dw); + for (; in >= 0; in -= a->n, out--) { + if (in > out) { + tcg_gen_shri_i64(tmp, vrb, in - out); + } else { + tcg_gen_shli_i64(tmp, vrb, out - in); + } + tcg_gen_andi_i64(tmp, tmp, 1ULL << out); + tcg_gen_or_i64(rt, rt, tmp); + } + in += 64; + } + + tcg_gen_trunc_i64_tl(cpu_gpr[a->rt], rt); + + tcg_temp_free_i64(vrb); + tcg_temp_free_i64(tmp); + tcg_temp_free_i64(rt); + + return true; +} + static bool do_vextdx(DisasContext *ctx, arg_VA *a, int size, bool right, void (*gen_helper)(TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv_ptr, TCGv)) {