| Message ID | 20211231073122.3183583-1-clg@kaod.org |
|---|---|
| State | New |
| Headers | show |
| Series | target/ppc: Check effective address validity | expand |
On 31/12/2021 08:31, Cédric Le Goater wrote: > For Radix translation, the EA range is 64-bits. when EA(2:11) are > nonzero, a segment interrupt should occur. > > Signed-off-by: Cédric Le Goater <clg@kaod.org> > --- Looks ok to me. Reviewed-by: Frederic Barrat <fbarrat@linux.ibm.com> Fred > target/ppc/mmu-radix64.h | 1 + > target/ppc/mmu-radix64.c | 5 +++++ > 2 files changed, 6 insertions(+) > > diff --git a/target/ppc/mmu-radix64.h b/target/ppc/mmu-radix64.h > index b70357cf345c..4c768aa5cc74 100644 > --- a/target/ppc/mmu-radix64.h > +++ b/target/ppc/mmu-radix64.h > @@ -5,6 +5,7 @@ > > /* Radix Quadrants */ > #define R_EADDR_MASK 0x3FFFFFFFFFFFFFFF > +#define R_EADDR_VALID_MASK 0xC00FFFFFFFFFFFFF > #define R_EADDR_QUADRANT 0xC000000000000000 > #define R_EADDR_QUADRANT0 0x0000000000000000 > #define R_EADDR_QUADRANT1 0x4000000000000000 > diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c > index d10ae001d7c9..040c055bff65 100644 > --- a/target/ppc/mmu-radix64.c > +++ b/target/ppc/mmu-radix64.c > @@ -32,6 +32,11 @@ static bool ppc_radix64_get_fully_qualified_addr(const CPUPPCState *env, > vaddr eaddr, > uint64_t *lpid, uint64_t *pid) > { > + /* When EA(2:11) are nonzero, raise a segment interrupt */ > + if (eaddr & ~R_EADDR_VALID_MASK) { > + return false; > + } > + > if (msr_hv) { /* MSR[HV] -> Hypervisor/bare metal */ > switch (eaddr & R_EADDR_QUADRANT) { > case R_EADDR_QUADRANT0:
On 12/31/21 08:31, Cédric Le Goater wrote: > For Radix translation, the EA range is 64-bits. when EA(2:11) are > nonzero, a segment interrupt should occur. > > Signed-off-by: Cédric Le Goater <clg@kaod.org> Applied in ppc-next. Thanks, C.
diff --git a/target/ppc/mmu-radix64.h b/target/ppc/mmu-radix64.h index b70357cf345c..4c768aa5cc74 100644 --- a/target/ppc/mmu-radix64.h +++ b/target/ppc/mmu-radix64.h @@ -5,6 +5,7 @@ /* Radix Quadrants */ #define R_EADDR_MASK 0x3FFFFFFFFFFFFFFF +#define R_EADDR_VALID_MASK 0xC00FFFFFFFFFFFFF #define R_EADDR_QUADRANT 0xC000000000000000 #define R_EADDR_QUADRANT0 0x0000000000000000 #define R_EADDR_QUADRANT1 0x4000000000000000 diff --git a/target/ppc/mmu-radix64.c b/target/ppc/mmu-radix64.c index d10ae001d7c9..040c055bff65 100644 --- a/target/ppc/mmu-radix64.c +++ b/target/ppc/mmu-radix64.c @@ -32,6 +32,11 @@ static bool ppc_radix64_get_fully_qualified_addr(const CPUPPCState *env, vaddr eaddr, uint64_t *lpid, uint64_t *pid) { + /* When EA(2:11) are nonzero, raise a segment interrupt */ + if (eaddr & ~R_EADDR_VALID_MASK) { + return false; + } + if (msr_hv) { /* MSR[HV] -> Hypervisor/bare metal */ switch (eaddr & R_EADDR_QUADRANT) { case R_EADDR_QUADRANT0:
For Radix translation, the EA range is 64-bits. when EA(2:11) are nonzero, a segment interrupt should occur. Signed-off-by: Cédric Le Goater <clg@kaod.org> --- target/ppc/mmu-radix64.h | 1 + target/ppc/mmu-radix64.c | 5 +++++ 2 files changed, 6 insertions(+)