| Message ID | 20211207172533.1410205-1-peter.maydell@linaro.org |
|---|---|
| State | New |
| Headers | show |
On 12/7/21 9:25 AM, Peter Maydell wrote: > Last minute pullreq with one patch, fixing the GICv3 ICH_MISR_EL2.LRENP > calculation. I went back-and-forth on whether to put this in, but: > * it's an effective regression from 6.1 (the bug itself has been > present since before then, but it was previously masked by the > other bug which we fixed in 9cee1efe92) > * I just realized it could cause a screaming maintenance interrupt > even for hypervisors like KVM that don't set LRENPIE > > On the other hand this is very late and we haven't seen it be a > problem with any guest except Qualcomm's hypervisor. So if you want > to decide it's better not going in that's OK too. > > Tested on the gitlab CI and with a local test of nested KVM. > > -- PMM > > The following changes since commit 7635eff97104242d618400e4b6746d0a5c97af82: > > Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into staging (2021-12-06 11:18:06 -0800) > > are available in the Git repository at: > > https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20211207 > > for you to fetch changes up to 2958e5150dfa297dd5a51fe57a29156b8744f07f: > > gicv3: fix ICH_MISR's LRENP computation (2021-12-07 15:30:08 +0000) > > ---------------------------------------------------------------- > target-arm queue: > * Fix calculation of ICH_MISR_EL2.LRENP to avoid incorrect generation > of maintenance interrupts > > ---------------------------------------------------------------- > Damien Hedde (1): > gicv3: fix ICH_MISR's LRENP computation > > hw/intc/arm_gicv3_cpuif.c | 3 ++- > 1 file changed, 2 insertions(+), 1 deletion(-) Applied, thanks. r~
Last minute pullreq with one patch, fixing the GICv3 ICH_MISR_EL2.LRENP calculation. I went back-and-forth on whether to put this in, but: * it's an effective regression from 6.1 (the bug itself has been present since before then, but it was previously masked by the other bug which we fixed in 9cee1efe92) * I just realized it could cause a screaming maintenance interrupt even for hypervisors like KVM that don't set LRENPIE On the other hand this is very late and we haven't seen it be a problem with any guest except Qualcomm's hypervisor. So if you want to decide it's better not going in that's OK too. Tested on the gitlab CI and with a local test of nested KVM. -- PMM The following changes since commit 7635eff97104242d618400e4b6746d0a5c97af82: Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into staging (2021-12-06 11:18:06 -0800) are available in the Git repository at: https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20211207 for you to fetch changes up to 2958e5150dfa297dd5a51fe57a29156b8744f07f: gicv3: fix ICH_MISR's LRENP computation (2021-12-07 15:30:08 +0000) ---------------------------------------------------------------- target-arm queue: * Fix calculation of ICH_MISR_EL2.LRENP to avoid incorrect generation of maintenance interrupts ---------------------------------------------------------------- Damien Hedde (1): gicv3: fix ICH_MISR's LRENP computation hw/intc/arm_gicv3_cpuif.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)