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[v2,10/15] target/m68k: Implement TRAPV

Message ID 20211202204900.50973-11-richard.henderson@linaro.org
State New
Headers show
Series target/m68k: Conditional traps + trap cleanup | expand

Commit Message

Richard Henderson Dec. 2, 2021, 8:48 p.m. UTC 
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 target/m68k/translate.c | 9 +++++++++
 1 file changed, 9 insertions(+)
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Patch

diff --git a/target/m68k/translate.c b/target/m68k/translate.c
index e5338b50ad..cfe292c929 100644
--- a/target/m68k/translate.c
+++ b/target/m68k/translate.c
@@ -4916,6 +4916,14 @@  DISAS_INSN(trapcc)
     do_trapcc(s, &c);
 }
 
+DISAS_INSN(trapv)
+{
+    DisasCompare c;
+
+    gen_cc_cond(&c, s, 9); /* V set */
+    do_trapcc(s, &c);
+}
+
 static void gen_load_fcr(DisasContext *s, TCGv res, int reg)
 {
     switch (reg) {
@@ -6079,6 +6087,7 @@  void register_m68k_insns (CPUM68KState *env)
     BASE(nop,       4e71, ffff);
     INSN(rtd,       4e74, ffff, RTD);
     BASE(rts,       4e75, ffff);
+    INSN(trapv,     4e76, ffff, M68000);
     INSN(rtr,       4e77, ffff, M68000);
     BASE(jump,      4e80, ffc0);
     BASE(jump,      4ec0, ffc0);