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[50.253.99.174]) by smtp.gmail.com with ESMTPSA id h14sm205427ils.75.2021.11.02.15.53.43 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Tue, 02 Nov 2021 15:53:43 -0700 (PDT) From: Warner Losh To: qemu-devel@nongnu.org Subject: [PATCH v2 24/30] bsd-user/arm/target_arch_signal.h: arm set_mcontext Date: Tue, 2 Nov 2021 16:52:42 -0600 Message-Id: <20211102225248.52999-25-imp@bsdimp.com> X-Mailer: git-send-email 2.33.0 In-Reply-To: <20211102225248.52999-1-imp@bsdimp.com> References: <20211102225248.52999-1-imp@bsdimp.com> MIME-Version: 1.0 Received-SPF: none client-ip=2607:f8b0:4864:20::12a; envelope-from=imp@bsdimp.com; helo=mail-il1-x12a.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Stacey Son , qemu-trivial@nongnu.org, Kyle Evans , Richard Henderson , Philippe Mathieu-Daude , Laurent Vivier , Michael Tokarev , Warner Losh Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Move the machine context to the CPU state. Signed-off-by: Stacey Son Signed-off-by: Kyle Evans Signed-off-by: Warner Losh Reviewed-by: Richard Henderson --- bsd-user/arm/target_arch_signal.h | 75 +++++++++++++++++++++++++++++++ 1 file changed, 75 insertions(+) diff --git a/bsd-user/arm/target_arch_signal.h b/bsd-user/arm/target_arch_signal.h index b42d08402f..3b2f56ffab 100644 --- a/bsd-user/arm/target_arch_signal.h +++ b/bsd-user/arm/target_arch_signal.h @@ -179,4 +179,79 @@ static inline abi_long get_mcontext(CPUARMState *env, target_mcontext_t *mcp, return err; } +/* Compare to arm/arm/exec_machdep.c set_mcontext() */ +static inline abi_long set_mcontext(CPUARMState *env, target_mcontext_t *mcp, + int srflag) +{ + int err = 0; + const uint32_t *gr = mcp->__gregs; + uint32_t cpsr, ccpsr = cpsr_read(env); + uint32_t fpscr; + + cpsr = tswap32(gr[TARGET_REG_CPSR]); + /* + * Only allow certain bits to change, reject attempted changes to non-user + * bits. In addition, make sure we're headed for user mode and none of the + * interrupt bits are set. + */ + if ((ccpsr & ~CPSR_USER) != (cpsr & ~CPSR_USER)) { + return -TARGET_EINVAL; + } + if ((cpsr & CPSR_M) != ARM_CPU_MODE_USR || + (cpsr & (CPSR_I | CPSR_F)) != 0) { + return -TARGET_EINVAL; + } + + /* + * Make sure that we either have no vfp, or it's the correct size. + * FreeBSD just ignores it, though, so maybe we'll need to adjust + * things below instead. + */ + if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_size != sizeof(target_mcontext_vfp_t)) { + return -TARGET_EINVAL; + } + /* + * Make sure T mode matches the PC's notion of thumb mode, although + * FreeBSD lets the processor sort this out, so we may need remove + * this check, or generate a signal... + */ + if (!!(tswap32(gr[TARGET_REG_PC]) & 1) != !!(cpsr & CPSR_T)) { + return -TARGET_EINVAL; + } + + env->regs[0] = tswap32(gr[TARGET_REG_R0]); + env->regs[1] = tswap32(gr[TARGET_REG_R1]); + env->regs[2] = tswap32(gr[TARGET_REG_R2]); + env->regs[3] = tswap32(gr[TARGET_REG_R3]); + env->regs[4] = tswap32(gr[TARGET_REG_R4]); + env->regs[5] = tswap32(gr[TARGET_REG_R5]); + env->regs[6] = tswap32(gr[TARGET_REG_R6]); + env->regs[7] = tswap32(gr[TARGET_REG_R7]); + env->regs[8] = tswap32(gr[TARGET_REG_R8]); + env->regs[9] = tswap32(gr[TARGET_REG_R9]); + env->regs[10] = tswap32(gr[TARGET_REG_R10]); + env->regs[11] = tswap32(gr[TARGET_REG_R11]); + env->regs[12] = tswap32(gr[TARGET_REG_R12]); + + env->regs[13] = tswap32(gr[TARGET_REG_SP]); + env->regs[14] = tswap32(gr[TARGET_REG_LR]); + env->regs[15] = tswap32(gr[TARGET_REG_PC]); + if (mcp->mc_vfp_size != 0 && mcp->mc_vfp_ptr != NULL) { + /* see set_vfpcontext in sys/arm/arm/exec_machdep.c */ + target_mcontext_vfp_t *vfp = (target_mcontext_vfp_t *)mcp->mc_vfp_ptr; + for (int i = 0; i < 32; i++) { + *aa32_vfp_dreg(env, i) = tswap64(vfp->mcv_reg[i]); + } + fpscr = tswap32(vfp->mcv_fpscr); + vfp_set_fpscr(env, fpscr); + /* + * linux-user sets fpexc, fpinst and fpinst2, but these aren't in + * FreeBSD's mcontext, what to do? + */ + } + cpsr_write(env, cpsr, CPSR_USER | CPSR_EXEC, CPSRWriteByInstr); + + return err; +} + #endif /* !_TARGET_ARCH_SIGNAL_H_ */