diff mbox series

[v2,22/30] bsd-user/arm/target_arch_signal.h: arm set_sigtramp_args

Message ID 20211102225248.52999-23-imp@bsdimp.com
State New
Headers show
Series bsd-user: arm (32-bit) support | expand

Commit Message

Warner Losh Nov. 2, 2021, 10:52 p.m. UTC
Implement set_sigtramp_args to setup the arguments to the sigtramp
calls.

Signed-off-by: Stacey Son <sson@FreeBSD.org>
Signed-off-by: Warner Losh <imp@bsdimp.com>
---
 bsd-user/arm/target_arch_signal.h | 47 +++++++++++++++++++++++++++++++
 1 file changed, 47 insertions(+)

Comments

Richard Henderson Nov. 3, 2021, 3:37 a.m. UTC | #1
On 11/2/21 6:52 PM, Warner Losh wrote:
> +    /*
> +     * Low bit indicates whether or not we're entering thumb mode.
> +     */
> +    cpsr = cpsr_read(env);
> +    if (ka->_sa_handler & 1) {
> +        cpsr |= CPSR_T;
> +    } else {
> +        cpsr &= ~CPSR_T;
> +    }
> +    cpsr_write(env, cpsr, CPSR_T, CPSRWriteByInstr);

Like I said before, you don't need the cpsr_read, because the mask ensures that only 
CPSR_T will change:

   cpsr_write(env, (ka->_sa_handler & 1) * CPSR_T, CPSR_T, CPSRWriteByInstr);


Otherwise,
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>


r~
Warner Losh Nov. 3, 2021, 7:14 p.m. UTC | #2
On Tue, Nov 2, 2021 at 9:37 PM Richard Henderson <
richard.henderson@linaro.org> wrote:

> On 11/2/21 6:52 PM, Warner Losh wrote:
> > +    /*
> > +     * Low bit indicates whether or not we're entering thumb mode.
> > +     */
> > +    cpsr = cpsr_read(env);
> > +    if (ka->_sa_handler & 1) {
> > +        cpsr |= CPSR_T;
> > +    } else {
> > +        cpsr &= ~CPSR_T;
> > +    }
> > +    cpsr_write(env, cpsr, CPSR_T, CPSRWriteByInstr);
>
> Like I said before, you don't need the cpsr_read, because the mask ensures
> that only
> CPSR_T will change:
>
>    cpsr_write(env, (ka->_sa_handler & 1) * CPSR_T, CPSR_T,
> CPSRWriteByInstr);
>
>
> Otherwise,
> Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
>

Thanks. Applied. I'd intended to do this for this round, but it slipped my
mind.

Warner
diff mbox series

Patch

diff --git a/bsd-user/arm/target_arch_signal.h b/bsd-user/arm/target_arch_signal.h
index 4bdfcbb8d7..61440b51b4 100644
--- a/bsd-user/arm/target_arch_signal.h
+++ b/bsd-user/arm/target_arch_signal.h
@@ -82,4 +82,51 @@  struct target_sigframe {
     target_mcontext_vfp_t sf_vfp; /* actual saved VFP context */
 };
 
+/*
+ * Compare to arm/arm/machdep.c sendsig()
+ * Assumes that target stack frame memory is locked.
+ */
+static inline abi_long
+set_sigtramp_args(CPUARMState *env, int sig, struct target_sigframe *frame,
+    abi_ulong frame_addr, struct target_sigaction *ka)
+{
+    abi_ulong cpsr;
+
+    /*
+     * Arguments to signal handler:
+     *  r0 = signal number
+     *  r1 = siginfo pointer
+     *  r2 = ucontext pointer
+     *  r5 = ucontext pointer
+     *  pc = signal handler pointer
+     *  sp = sigframe struct pointer
+     *  lr = sigtramp at base of user stack
+     */
+
+    env->regs[0] = sig;
+    env->regs[1] = frame_addr +
+        offsetof(struct target_sigframe, sf_si);
+    env->regs[2] = frame_addr +
+        offsetof(struct target_sigframe, sf_uc);
+
+    /* the trampoline uses r5 as the uc address */
+    env->regs[5] = frame_addr +
+        offsetof(struct target_sigframe, sf_uc);
+    env->regs[TARGET_REG_PC] = ka->_sa_handler & ~1;
+    env->regs[TARGET_REG_SP] = frame_addr;
+    env->regs[TARGET_REG_LR] = TARGET_PS_STRINGS - TARGET_SZSIGCODE;
+    /*
+     * Low bit indicates whether or not we're entering thumb mode.
+     */
+    cpsr = cpsr_read(env);
+    if (ka->_sa_handler & 1) {
+        cpsr |= CPSR_T;
+    } else {
+        cpsr &= ~CPSR_T;
+    }
+    cpsr_write(env, cpsr, CPSR_T, CPSRWriteByInstr);
+
+    return 0;
+}
+
 #endif /* !_TARGET_ARCH_SIGNAL_H_ */