mbox

[PULL,00/17] MIPS patches for 2021-10-18

Message ID 20211017225245.2618892-1-f4bug@amsat.org
State New
Headers show

Pull-request

https://github.com/philmd/qemu.git tags/mips-20211018

Message

Philippe Mathieu-Daudé Oct. 17, 2021, 10:52 p.m. UTC 
The following changes since commit c148a0572130ff485cd2249fbdd1a3260d5e10a4:

  Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20211016' into staging (2021-10-16 11:16:28 -0700)

are available in the Git repository at:

  https://github.com/philmd/qemu.git tags/mips-20211018

for you to fetch changes up to 2792cf20ca7eed0e354a0ed731422411faca4908:

  via-ide: Avoid using isa_get_irq() (2021-10-18 00:41:36 +0200)

----------------------------------------------------------------
MIPS patches queue

Hardware emulation:
- Generate FDT blob for Boston machine (Jiaxun)
- VIA chipset cleanups (Zoltan)

TCG:
- Use tcg_constant() in Compact branch and MSA opcodes
- Restrict nanoMIPS DSP MULT[U] opcode accumulator to Rel6
- Fix DEXTRV_S.H DSP opcode
- Remove unused TCG temporary for some DSP opcodes

----------------------------------------------------------------

BALATON Zoltan (4):
  via-ide: Set user_creatable to false
  vt82c686: Move common code to via_isa_realize
  vt82c686: Add a method to VIA_ISA to raise ISA interrupts
  via-ide: Avoid using isa_get_irq()

Jiaxun Yang (3):
  hw/mips/boston: Massage memory map information
  hw/mips/boston: Allow loading elf kernel and dtb
  hw/mips/boston: Add FDT generator

Philippe Mathieu-Daudé (10):
  target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
  target/mips: Remove unused register from MSA 2R/2RF instruction format
  target/mips: Use tcg_constant_i32() in gen_msa_elm_df()
  target/mips: Use tcg_constant_i32() in gen_msa_2rf()
  target/mips: Use tcg_constant_i32() in gen_msa_2r()
  target/mips: Use tcg_constant_i32() in gen_msa_3rf()
  target/mips: Use explicit extract32() calls in gen_msa_i5()
  target/mips: Use tcg_constant_tl() in gen_compute_compact_branch()
  target/mips: Fix DEXTRV_S.H DSP opcode
  target/mips: Remove unused TCG temporary in gen_mipsdsp_accinsn()

 include/hw/isa/vt82c686.h                |   4 +
 hw/ide/via.c                             |   7 +-
 hw/isa/vt82c686.c                        |  75 +++--
 hw/mips/boston.c                         | 371 +++++++++++++++++++++--
 target/mips/tcg/msa_translate.c          |  51 ++--
 target/mips/tcg/translate.c              |  11 +-
 target/mips/tcg/nanomips_translate.c.inc |   6 +
 7 files changed, 415 insertions(+), 110 deletions(-)

Comments

Richard Henderson Oct. 18, 2021, 6:41 p.m. UTC | #1 
On 10/17/21 3:52 PM, Philippe Mathieu-Daudé wrote:
> The following changes since commit c148a0572130ff485cd2249fbdd1a3260d5e10a4:
> 
>    Merge remote-tracking branch 'remotes/rth/tags/pull-tcg-20211016' into staging (2021-10-16 11:16:28 -0700)
> 
> are available in the Git repository at:
> 
>    https://github.com/philmd/qemu.git tags/mips-20211018
> 
> for you to fetch changes up to 2792cf20ca7eed0e354a0ed731422411faca4908:
> 
>    via-ide: Avoid using isa_get_irq() (2021-10-18 00:41:36 +0200)
> 
> ----------------------------------------------------------------
> MIPS patches queue
> 
> Hardware emulation:
> - Generate FDT blob for Boston machine (Jiaxun)
> - VIA chipset cleanups (Zoltan)
> 
> TCG:
> - Use tcg_constant() in Compact branch and MSA opcodes
> - Restrict nanoMIPS DSP MULT[U] opcode accumulator to Rel6
> - Fix DEXTRV_S.H DSP opcode
> - Remove unused TCG temporary for some DSP opcodes
> 
> ----------------------------------------------------------------
> 
> BALATON Zoltan (4):
>    via-ide: Set user_creatable to false
>    vt82c686: Move common code to via_isa_realize
>    vt82c686: Add a method to VIA_ISA to raise ISA interrupts
>    via-ide: Avoid using isa_get_irq()
> 
> Jiaxun Yang (3):
>    hw/mips/boston: Massage memory map information
>    hw/mips/boston: Allow loading elf kernel and dtb
>    hw/mips/boston: Add FDT generator
> 
> Philippe Mathieu-Daudé (10):
>    target/mips: Check nanoMIPS DSP MULT[U] accumulator with Release 6
>    target/mips: Remove unused register from MSA 2R/2RF instruction format
>    target/mips: Use tcg_constant_i32() in gen_msa_elm_df()
>    target/mips: Use tcg_constant_i32() in gen_msa_2rf()
>    target/mips: Use tcg_constant_i32() in gen_msa_2r()
>    target/mips: Use tcg_constant_i32() in gen_msa_3rf()
>    target/mips: Use explicit extract32() calls in gen_msa_i5()
>    target/mips: Use tcg_constant_tl() in gen_compute_compact_branch()
>    target/mips: Fix DEXTRV_S.H DSP opcode
>    target/mips: Remove unused TCG temporary in gen_mipsdsp_accinsn()
> 
>   include/hw/isa/vt82c686.h                |   4 +
>   hw/ide/via.c                             |   7 +-
>   hw/isa/vt82c686.c                        |  75 +++--
>   hw/mips/boston.c                         | 371 +++++++++++++++++++++--
>   target/mips/tcg/msa_translate.c          |  51 ++--
>   target/mips/tcg/translate.c              |  11 +-
>   target/mips/tcg/nanomips_translate.c.inc |   6 +
>   7 files changed, 415 insertions(+), 110 deletions(-)

Applied, thanks.

r~