| Message ID | 20211013212132.31519-7-mark.cave-ayland@ilande.co.uk |
|---|---|
| State | New |
| Headers | show |
| Series | q800: GLUE updates for A/UX mode | expand |
Le 13/10/2021 à 23:21, Mark Cave-Ayland a écrit : > When the hardware is operating in classic mode the SONIC on-board Ethernet IRQ is > routed to nubus IRQ 9 instead of directly to the CPU at level 3. This does not > affect the framebuffer which although it exists in slot 9, has its own > dedicated IRQ on the Quadra 800 hardware. > > Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> > --- > hw/m68k/q800.c | 57 ++++++++++++++++++++++++++++++++++++++++---------- > 1 file changed, 46 insertions(+), 11 deletions(-) > > diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c > index 0093872d89..d55e6a7541 100644 > --- a/hw/m68k/q800.c > +++ b/hw/m68k/q800.c > @@ -101,6 +101,7 @@ struct GLUEState { > M68kCPU *cpu; > uint8_t ipr; > uint8_t auxmode; > + qemu_irq irqs[1]; > }; > > #define GLUE_IRQ_IN_VIA1 0 > @@ -108,27 +109,50 @@ struct GLUEState { > #define GLUE_IRQ_IN_SONIC 2 > #define GLUE_IRQ_IN_ESCC 3 > > +#define GLUE_IRQ_NUBUS_9 0 > + > static void GLUE_set_irq(void *opaque, int irq, int level) > { > GLUEState *s = opaque; > int i; > > - switch (irq) { > - case GLUE_IRQ_IN_VIA1: > - irq = 5; > - break; > + switch (s->auxmode) { > + case 0: why don't you use "if () {} else {}" rather than "switch() { case 0: ; case 1: }" ? (I don't think we need to manage a "default:" case.) Thanks, Laurent
On 16/10/2021 19:08, Laurent Vivier wrote: > Le 13/10/2021 à 23:21, Mark Cave-Ayland a écrit : >> When the hardware is operating in classic mode the SONIC on-board Ethernet IRQ is >> routed to nubus IRQ 9 instead of directly to the CPU at level 3. This does not >> affect the framebuffer which although it exists in slot 9, has its own >> dedicated IRQ on the Quadra 800 hardware. >> >> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> >> --- >> hw/m68k/q800.c | 57 ++++++++++++++++++++++++++++++++++++++++---------- >> 1 file changed, 46 insertions(+), 11 deletions(-) >> >> diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c >> index 0093872d89..d55e6a7541 100644 >> --- a/hw/m68k/q800.c >> +++ b/hw/m68k/q800.c >> @@ -101,6 +101,7 @@ struct GLUEState { >> M68kCPU *cpu; >> uint8_t ipr; >> uint8_t auxmode; >> + qemu_irq irqs[1]; >> }; >> >> #define GLUE_IRQ_IN_VIA1 0 >> @@ -108,27 +109,50 @@ struct GLUEState { >> #define GLUE_IRQ_IN_SONIC 2 >> #define GLUE_IRQ_IN_ESCC 3 >> >> +#define GLUE_IRQ_NUBUS_9 0 >> + >> static void GLUE_set_irq(void *opaque, int irq, int level) >> { >> GLUEState *s = opaque; >> int i; >> >> - switch (irq) { >> - case GLUE_IRQ_IN_VIA1: >> - irq = 5; >> - break; >> + switch (s->auxmode) { >> + case 0: > > why don't you use "if () {} else {}" rather than "switch() { case 0: ; case 1: }" ? > (I don't think we need to manage a "default:" case.) Sure, I can do that: I used the switch()/default originally to make sure the irq wasn't being set to an unexpected value. I've also just spotted that the comment in this patch is incorrect: /* * Since the framebuffer in slot 0x9 uses a separate IRQ, wire the unused * IRQ via GLUE for use by SONIC Ethernet in A/UX mode */ This should be classic mode, of course. ATB, Mark.
diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c index 0093872d89..d55e6a7541 100644 --- a/hw/m68k/q800.c +++ b/hw/m68k/q800.c @@ -101,6 +101,7 @@ struct GLUEState { M68kCPU *cpu; uint8_t ipr; uint8_t auxmode; + qemu_irq irqs[1]; }; #define GLUE_IRQ_IN_VIA1 0 @@ -108,27 +109,50 @@ struct GLUEState { #define GLUE_IRQ_IN_SONIC 2 #define GLUE_IRQ_IN_ESCC 3 +#define GLUE_IRQ_NUBUS_9 0 + static void GLUE_set_irq(void *opaque, int irq, int level) { GLUEState *s = opaque; int i; - switch (irq) { - case GLUE_IRQ_IN_VIA1: - irq = 5; - break; + switch (s->auxmode) { + case 0: + /* A/UX mode */ + switch (irq) { + case GLUE_IRQ_IN_VIA1: + irq = 5; + break; - case GLUE_IRQ_IN_VIA2: - irq = 1; - break; + case GLUE_IRQ_IN_VIA2: + irq = 1; + break; + + case GLUE_IRQ_IN_SONIC: + irq = 2; + break; - case GLUE_IRQ_IN_SONIC: - irq = 2; + case GLUE_IRQ_IN_ESCC: + irq = 3; + break; + + default: + g_assert_not_reached(); + } break; - case GLUE_IRQ_IN_ESCC: - irq = 3; + case 1: + /* Classic mode */ + switch (irq) { + case GLUE_IRQ_IN_SONIC: + /* Route to VIA2 instead */ + qemu_set_irq(s->irqs[GLUE_IRQ_NUBUS_9], level); + return; + } break; + + default: + g_assert_not_reached(); } if (level) { @@ -186,9 +210,12 @@ static Property glue_properties[] = { static void glue_init(Object *obj) { DeviceState *dev = DEVICE(obj); + GLUEState *s = GLUE(dev); qdev_init_gpio_in(dev, GLUE_set_irq, 8); qdev_init_gpio_in_named(dev, glue_auxmode_set_irq, "auxmode", 1); + + qdev_init_gpio_out(dev, s->irqs, 1); } static void glue_class_init(ObjectClass *klass, void *data) @@ -454,6 +481,14 @@ static void q800_init(MachineState *machine) VIA2_NUBUS_IRQ_9 + i)); } + /* + * Since the framebuffer in slot 0x9 uses a separate IRQ, wire the unused + * IRQ via GLUE for use by SONIC Ethernet in A/UX mode + */ + qdev_connect_gpio_out(glue, GLUE_IRQ_NUBUS_9, + qdev_get_gpio_in_named(via2_dev, "nubus-irq", + VIA2_NUBUS_IRQ_9)); + nubus = &NUBUS_BRIDGE(dev)->bus; /* framebuffer in nubus slot #9 */
When the hardware is operating in classic mode the SONIC on-board Ethernet IRQ is routed to nubus IRQ 9 instead of directly to the CPU at level 3. This does not affect the framebuffer which although it exists in slot 9, has its own dedicated IRQ on the Quadra 800 hardware. Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk> --- hw/m68k/q800.c | 57 ++++++++++++++++++++++++++++++++++++++++---------- 1 file changed, 46 insertions(+), 11 deletions(-)