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[83.35.24.118]) by smtp.gmail.com with ESMTPSA id i18sm15033279wrn.64.2021.09.26.15.29.47 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 26 Sep 2021 15:29:48 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH v8 32/40] target/rx: Restrict has_work() handler to sysemu Date: Mon, 27 Sep 2021 00:27:08 +0200 Message-Id: <20210926222716.1732932-33-f4bug@amsat.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210926222716.1732932-1-f4bug@amsat.org> References: <20210926222716.1732932-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::42f; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x42f.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.25, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , =?utf-8?q?Philippe_Mat?= =?utf-8?q?hieu-Daud=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Restrict has_work() to sysemu. Reviewed-by: Richard Henderson Signed-off-by: Philippe Mathieu-Daudé --- target/rx/cpu.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/target/rx/cpu.c b/target/rx/cpu.c index 25a4aa2976d..ac6b40b2716 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -41,11 +41,13 @@ static void rx_cpu_synchronize_from_tb(CPUState *cs, cpu->env.pc = tb->pc; } +#if !defined(CONFIG_USER_ONLY) static bool rx_cpu_has_work(CPUState *cs) { return cs->interrupt_request & (CPU_INTERRUPT_HARD | CPU_INTERRUPT_FIR); } +#endif /* !CONFIG_USER_ONLY */ static void rx_cpu_reset(DeviceState *dev) { @@ -189,6 +191,7 @@ static const struct TCGCPUOps rx_tcg_ops = { .tlb_fill = rx_cpu_tlb_fill, #ifndef CONFIG_USER_ONLY + .has_work = rx_cpu_has_work, .cpu_exec_interrupt = rx_cpu_exec_interrupt, .do_interrupt = rx_cpu_do_interrupt, #endif /* !CONFIG_USER_ONLY */ @@ -206,7 +209,6 @@ static void rx_cpu_class_init(ObjectClass *klass, void *data) &rcc->parent_reset); cc->class_by_name = rx_cpu_class_by_name; - cc->has_work = rx_cpu_has_work; cc->dump_state = rx_cpu_dump_state; cc->set_pc = rx_cpu_set_pc;