| Message ID | 20210831164007.297781-10-luis.pires@eldorado.org.br |
|---|---|
| State | New |
| Headers | show |
| Series | target/ppc: DFP instructions using decodetree | expand |
On 8/31/21 9:39 AM, Luis Pires wrote: > +DEF_HELPER_3(DCFFIXQQ, void, env, fprp, avr) Shouldn't be upcase. None of the others are. > diff --git a/target/ppc/translate.c b/target/ppc/translate.c > index 5489b4b6e0..c3739f7370 100644 > --- a/target/ppc/translate.c > +++ b/target/ppc/translate.c > @@ -7422,7 +7422,12 @@ static inline void set_avr64(int regno, TCGv_i64 src, bool high) > /* > * Helpers for decodetree used by !function for decoding arguments. > */ > -static int times_4(DisasContext *ctx, int x) > +static inline int times_2(DisasContext *ctx, int x) > +{ > + return x * 2; > +} > + > +static inline int times_4(DisasContext *ctx, int x) Don't add the inlines. The compiler will decide for itself, and this hides unused function errors under gcc that are diagnosed by clang. r~
On 31/08/2021 15:18, Richard Henderson wrote: > [E-MAIL EXTERNO] Não clique em links ou abra anexos, a menos que você > possa confirmar o remetente e saber que o conteúdo é seguro. Em caso > de e-mail suspeito entre imediatamente em contato com o DTI. > > On 8/31/21 9:39 AM, Luis Pires wrote: >> +DEF_HELPER_3(DCFFIXQQ, void, env, fprp, avr) > > Shouldn't be upcase. None of the others are. > The reason for this change is on patch 13 and onwards. Matching the case of the instruction name in the trans_<INSN> method and the helper makes it easier to create macros, e.g. TRANS_DFP_BF_A_DCM on patch 13. The idea was to change the helpers as we moved instructions to decodetree. Alternatively, the macro could receive the instruction name and the gen_helper_<INSN>, or we could drop this kind of macro usage in favor of something else. The former is a bit repetitive, while the latter would require more changes in the current code structure. >> diff --git a/target/ppc/translate.c b/target/ppc/translate.c index >> 5489b4b6e0..c3739f7370 100644 --- a/target/ppc/translate.c +++ >> b/target/ppc/translate.c @@ -7422,7 +7422,12 @@ static inline void >> set_avr64(int regno, TCGv_i64 src, bool high) /* * Helpers for >> decodetree used by !function for decoding arguments. */ -static int >> times_4(DisasContext *ctx, int x) +static inline int >> times_2(DisasContext *ctx, int x) +{ + return x * 2; +} + >> +static inline int times_4(DisasContext *ctx, int x) > > Don't add the inlines. The compiler will decide for itself, and this > hides unused function errors under gcc that are diagnosed by clang. > > > r~ >
From: Matheus K. Ferst <matheus.ferst@eldorado.org.br> > > On 8/31/21 9:39 AM, Luis Pires wrote: > >> +DEF_HELPER_3(DCFFIXQQ, void, env, fprp, avr) > > > > Shouldn't be upcase. None of the others are. > > > > The reason for this change is on patch 13 and onwards. Matching the case of the > instruction name in the trans_<INSN> method and the helper makes it easier to > create macros, e.g. TRANS_DFP_BF_A_DCM on patch 13. The idea was to > change the helpers as we moved instructions to decodetree. > > Alternatively, the macro could receive the instruction name and the > gen_helper_<INSN>, or we could drop this kind of macro usage in favor of > something else. The former is a bit repetitive, while the latter would require > more changes in the current code structure. And our intention is also to send a standalone patch later on, changing to uppercase the other new (decodetree) helpers whose names are directly related to instruction names, making them consistent. -- Luis Pires Instituto de Pesquisas ELDORADO Aviso Legal - Disclaimer <https://www.eldorado.org.br/disclaimer.html>
diff --git a/target/ppc/dfp_helper.c b/target/ppc/dfp_helper.c index 07341a69f5..01a7ead783 100644 --- a/target/ppc/dfp_helper.c +++ b/target/ppc/dfp_helper.c @@ -970,6 +970,17 @@ static void CFFIX_PPs(struct PPC_DFP *dfp) DFP_HELPER_CFFIX(dcffix, 64) DFP_HELPER_CFFIX(dcffixq, 128) +void helper_DCFFIXQQ(CPUPPCState *env, ppc_fprp_t *t, ppc_avr_t *b) +{ + struct PPC_DFP dfp; + dfp_prepare_decimal128(&dfp, NULL, NULL, env); + decNumberFromInt128(&dfp.t, (uint64_t)b->VsrD(1), (int64_t)b->VsrD(0)); + dfp_finalize_decimal128(&dfp); + CFFIX_PPs(&dfp); + + set_dfp128(t, &dfp.vt); +} + #define DFP_HELPER_CTFIX(op, size) \ void helper_##op(CPUPPCState *env, ppc_fprp_t *t, ppc_fprp_t *b) \ { \ diff --git a/target/ppc/helper.h b/target/ppc/helper.h index 4076aa281e..fff7bd46ad 100644 --- a/target/ppc/helper.h +++ b/target/ppc/helper.h @@ -734,6 +734,7 @@ DEF_HELPER_3(drsp, void, env, fprp, fprp) DEF_HELPER_3(drdpq, void, env, fprp, fprp) DEF_HELPER_3(dcffix, void, env, fprp, fprp) DEF_HELPER_3(dcffixq, void, env, fprp, fprp) +DEF_HELPER_3(DCFFIXQQ, void, env, fprp, avr) DEF_HELPER_3(dctfix, void, env, fprp, fprp) DEF_HELPER_3(dctfixq, void, env, fprp, fprp) DEF_HELPER_4(ddedpd, void, env, fprp, fprp, i32) diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode index 9fd8d6b817..92ea2d0739 100644 --- a/target/ppc/insn32.decode +++ b/target/ppc/insn32.decode @@ -43,6 +43,10 @@ &X_bfl bf l:bool ra rb @X_bfl ...... bf:3 - l:1 ra:5 rb:5 ..........- &X_bfl +&X_frtp_vrb frtp vrb +%x_frtp 22:4 !function=times_2 +@X_frtp_vrb ...... ....0 ..... vrb:5 .......... . &X_frtp_vrb frtp=%x_frtp + ### Fixed-Point Load Instructions LBZ 100010 ..... ..... ................ @D @@ -121,6 +125,10 @@ SETBCR 011111 ..... ..... ----- 0110100000 - @X_bi SETNBC 011111 ..... ..... ----- 0111000000 - @X_bi SETNBCR 011111 ..... ..... ----- 0111100000 - @X_bi +### Decimal Floating-Point Conversion Instructions + +DCFFIXQQ 111111 ..... 00000 ..... 1111100010 - @X_frtp_vrb + ## Vector Bit Manipulation Instruction VCFUGED 000100 ..... ..... ..... 10101001101 @VX diff --git a/target/ppc/translate.c b/target/ppc/translate.c index 5489b4b6e0..c3739f7370 100644 --- a/target/ppc/translate.c +++ b/target/ppc/translate.c @@ -7422,7 +7422,12 @@ static inline void set_avr64(int regno, TCGv_i64 src, bool high) /* * Helpers for decodetree used by !function for decoding arguments. */ -static int times_4(DisasContext *ctx, int x) +static inline int times_2(DisasContext *ctx, int x) +{ + return x * 2; +} + +static inline int times_4(DisasContext *ctx, int x) { return x * 4; } diff --git a/target/ppc/translate/dfp-impl.c.inc b/target/ppc/translate/dfp-impl.c.inc index 6c556dc2e1..d5b66567a6 100644 --- a/target/ppc/translate/dfp-impl.c.inc +++ b/target/ppc/translate/dfp-impl.c.inc @@ -230,3 +230,20 @@ GEN_DFP_T_FPR_I32_Rc(dscriq, rA, DCM) #undef GEN_DFP_T_A_B_I32_Rc #undef GEN_DFP_T_B_Rc #undef GEN_DFP_T_FPR_I32_Rc + +static bool trans_DCFFIXQQ(DisasContext *ctx, arg_DCFFIXQQ *a) +{ + TCGv_ptr rt, rb; + + REQUIRE_INSNS_FLAGS2(ctx, DFP); + REQUIRE_FPU(ctx); + REQUIRE_VECTOR(ctx); + + rt = gen_fprp_ptr(a->frtp); + rb = gen_avr_ptr(a->vrb); + gen_helper_DCFFIXQQ(cpu_env, rt, rb); + tcg_temp_free_ptr(rt); + tcg_temp_free_ptr(rb); + + return true; +}
Implement the following PowerISA v3.1 instruction: dcffixqq: DFP Convert From Fixed Quadword Quad Signed-off-by: Luis Pires <luis.pires@eldorado.org.br> --- target/ppc/dfp_helper.c | 11 +++++++++++ target/ppc/helper.h | 1 + target/ppc/insn32.decode | 8 ++++++++ target/ppc/translate.c | 7 ++++++- target/ppc/translate/dfp-impl.c.inc | 17 +++++++++++++++++ 5 files changed, 43 insertions(+), 1 deletion(-)