From patchwork Thu Aug 5 02:53:10 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: LIU Zhiwei X-Patchwork-Id: 1513721 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4GgD1S6ytlz9s1l for ; Thu, 5 Aug 2021 13:02:36 +1000 (AEST) Received: from localhost ([::1]:53318 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1mBTeU-0003q7-M6 for incoming@patchwork.ozlabs.org; Wed, 04 Aug 2021 23:02:34 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:48378) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mBTcf-0000te-PY; Wed, 04 Aug 2021 23:00:41 -0400 Received: from out28-170.mail.aliyun.com ([115.124.28.170]:48057) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1mBTcd-0001Oa-VA; Wed, 04 Aug 2021 23:00:41 -0400 X-Alimail-AntiSpam: AC=CONTINUE; BC=0.08804092|-1; CH=green; DM=|CONTINUE|false|; DS=CONTINUE|ham_system_inform|0.0587047-0.000653314-0.940642; FP=0|0|0|0|0|-1|-1|-1; HT=ay29a033018047213; MF=zhiwei_liu@c-sky.com; NM=1; PH=DS; RN=7; RT=7; SR=0; TI=SMTPD_---.KvYsTR0_1628132434; Received: from roman-VirtualBox.hz.ali.com(mailfrom:zhiwei_liu@c-sky.com fp:SMTPD_---.KvYsTR0_1628132434) by smtp.aliyun-inc.com(10.147.41.187); Thu, 05 Aug 2021 11:00:35 +0800 From: LIU Zhiwei To: qemu-devel@nongnu.org, qemu-riscv@nongnu.org Subject: [RFC PATCH 11/13] target/riscv: Fix srow Date: Thu, 5 Aug 2021 10:53:10 +0800 Message-Id: <20210805025312.15720-12-zhiwei_liu@c-sky.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20210805025312.15720-1-zhiwei_liu@c-sky.com> References: <20210805025312.15720-1-zhiwei_liu@c-sky.com> Received-SPF: none client-ip=115.124.28.170; envelope-from=zhiwei_liu@c-sky.com; helo=out28-170.mail.aliyun.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_NONE=0.001, UNPARSEABLE_RELAY=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: palmer@dabbelt.com, richard.henderson@linaro.org, bin.meng@windriver.com, Alistair.Francis@wdc.com, LIU Zhiwei Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Always fill MSB 32 bits with 1s in source register before calling gen_sro. Otherwise it may not only shift in 1s. Signed-off-by: LIU Zhiwei --- target/riscv/insn_trans/trans_rvb.c.inc | 4 ++-- target/riscv/translate.c | 7 +++++++ 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvb.c.inc b/target/riscv/insn_trans/trans_rvb.c.inc index 58921f3224..0bae0a2bbf 100644 --- a/target/riscv/insn_trans/trans_rvb.c.inc +++ b/target/riscv/insn_trans/trans_rvb.c.inc @@ -339,14 +339,14 @@ static bool trans_srow(DisasContext *ctx, arg_srow *a) { REQUIRE_64BIT(ctx); REQUIRE_EXT(ctx, RVB); - return gen_shiftw(ctx, a, gen_sro); + return gen_shiftw(ctx, a, gen_srow); } static bool trans_sroiw(DisasContext *ctx, arg_sroiw *a) { REQUIRE_64BIT(ctx); REQUIRE_EXT(ctx, RVB); - return gen_shiftiw(ctx, a, gen_sro); + return gen_shiftiw(ctx, a, gen_srow); } static bool trans_rorw(DisasContext *ctx, arg_rorw *a) diff --git a/target/riscv/translate.c b/target/riscv/translate.c index 160a2df629..5ee0feac4b 100644 --- a/target/riscv/translate.c +++ b/target/riscv/translate.c @@ -669,6 +669,13 @@ static void gen_sro(TCGv ret, TCGv arg1, TCGv arg2) tcg_gen_not_tl(ret, ret); } +static void gen_srow(TCGv ret, TCGv arg1, TCGv arg2) +{ + TCGv ones = tcg_constant_tl(UINT32_MAX); + tcg_gen_deposit_tl(arg1, arg1, ones, 32, 32); + gen_sro(ret, arg1, arg2); +} + static bool gen_grevi(DisasContext *ctx, arg_grevi *a) { TCGv dest = gpr_dst(ctx, a->rd);