| Message ID | 20210801235926.3178085-4-f4bug@amsat.org |
|---|---|
| State | New |
| Headers | show |
| Series | target/mips: Convert NEC Vr54xx to decodetree | expand |
On 8/1/21 1:59 PM, Philippe Mathieu-Daudé wrote: > Convert the following Integer Multiply-Accumulate opcodes: > > * MACC Multiply, accumulate, and move LO > * MACCHI Multiply, accumulate, and move HI > * MACCHIU Unsigned multiply, accumulate, and move HI > * MACCU Unsigned multiply, accumulate, and move LO > > Since all opcodes are generated using the same pattern, we > add the gen_helper_mult_acc_t typedef and MULT_ACC() macro > to remove boilerplate code. > > Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org> > --- > target/mips/tcg/vr54xx.decode | 9 +++++++ > target/mips/tcg/translate.c | 16 ------------ > target/mips/tcg/vr54xx_translate.c | 40 ++++++++++++++++++++++++++++++ > 3 files changed, 49 insertions(+), 16 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> > +#define MULT_ACC(opcode, gen_helper) \ > +static bool trans_##opcode(DisasContext *ctx, arg_r *a) \ > +{ \ > + return trans_mult_acc(ctx, a, gen_helper); \ > +} Perhaps copy the TRANS macro from ppc/translate.c, so we don't have to have so many single-use macros like this? r~
On 8/2/21 9:50 PM, Richard Henderson wrote: > On 8/1/21 1:59 PM, Philippe Mathieu-Daudé wrote: >> Convert the following Integer Multiply-Accumulate opcodes: >> >> * MACC Multiply, accumulate, and move LO >> * MACCHI Multiply, accumulate, and move HI >> * MACCHIU Unsigned multiply, accumulate, and move HI >> * MACCU Unsigned multiply, accumulate, and move LO >> >> Since all opcodes are generated using the same pattern, we >> add the gen_helper_mult_acc_t typedef and MULT_ACC() macro >> to remove boilerplate code. >> >> Signed-off-by: Philippe Mathieu-Daudé<f4bug@amsat.org> >> --- >> target/mips/tcg/vr54xx.decode | 9 +++++++ >> target/mips/tcg/translate.c | 16 ------------ >> target/mips/tcg/vr54xx_translate.c | 40 ++++++++++++++++++++++++++++++ >> 3 files changed, 49 insertions(+), 16 deletions(-) > > Reviewed-by: Richard Henderson <richard.henderson@linaro.org> > > >> +#define MULT_ACC(opcode, gen_helper) \ >> +static bool trans_##opcode(DisasContext *ctx, arg_r *a) \ >> +{ \ >> + return trans_mult_acc(ctx, a, gen_helper); \ >> +} > > Perhaps copy the TRANS macro from ppc/translate.c, so we don't have to > have so many single-use macros like this? TIL the recent changes in ppc/translate.c, thanks, I will see what I can reuse :)
diff --git a/target/mips/tcg/vr54xx.decode b/target/mips/tcg/vr54xx.decode index f6b3e42c999..73778f101a5 100644 --- a/target/mips/tcg/vr54xx.decode +++ b/target/mips/tcg/vr54xx.decode @@ -6,3 +6,12 @@ # # Reference: VR5432 Microprocessor User’s Manual # (Document Number U13751EU5V0UM00) + +&r rs rt rd + +@rs_rt_rd ...... rs:5 rt:5 rd:5 ..... ...... &r + +MACC 000000 ..... ..... ..... 00101011000 @rs_rt_rd +MACCU 000000 ..... ..... ..... 00101011001 @rs_rt_rd +MACCHI 000000 ..... ..... ..... 01101011000 @rs_rt_rd +MACCHIU 000000 ..... ..... ..... 01101011001 @rs_rt_rd diff --git a/target/mips/tcg/translate.c b/target/mips/tcg/translate.c index 98dfcf5afd1..8d29a0d4e4b 100644 --- a/target/mips/tcg/translate.c +++ b/target/mips/tcg/translate.c @@ -300,16 +300,12 @@ enum { enum { OPC_VR54XX_MULS = (0x03 << 6) | OPC_MULT, OPC_VR54XX_MULSU = (0x03 << 6) | OPC_MULTU, - OPC_VR54XX_MACC = (0x05 << 6) | OPC_MULT, - OPC_VR54XX_MACCU = (0x05 << 6) | OPC_MULTU, OPC_VR54XX_MSAC = (0x07 << 6) | OPC_MULT, OPC_VR54XX_MSACU = (0x07 << 6) | OPC_MULTU, OPC_VR54XX_MULHI = (0x09 << 6) | OPC_MULT, OPC_VR54XX_MULHIU = (0x09 << 6) | OPC_MULTU, OPC_VR54XX_MULSHI = (0x0B << 6) | OPC_MULT, OPC_VR54XX_MULSHIU = (0x0B << 6) | OPC_MULTU, - OPC_VR54XX_MACCHI = (0x0D << 6) | OPC_MULT, - OPC_VR54XX_MACCHIU = (0x0D << 6) | OPC_MULTU, OPC_VR54XX_MSACHI = (0x0F << 6) | OPC_MULT, OPC_VR54XX_MSACHIU = (0x0F << 6) | OPC_MULTU, }; @@ -3780,12 +3776,6 @@ static void gen_mul_vr54xx(DisasContext *ctx, uint32_t opc, case OPC_VR54XX_MULSU: gen_helper_mulsu(t0, cpu_env, t0, t1); break; - case OPC_VR54XX_MACC: - gen_helper_macc(t0, cpu_env, t0, t1); - break; - case OPC_VR54XX_MACCU: - gen_helper_maccu(t0, cpu_env, t0, t1); - break; case OPC_VR54XX_MSAC: gen_helper_msac(t0, cpu_env, t0, t1); break; @@ -3804,12 +3794,6 @@ static void gen_mul_vr54xx(DisasContext *ctx, uint32_t opc, case OPC_VR54XX_MULSHIU: gen_helper_mulshiu(t0, cpu_env, t0, t1); break; - case OPC_VR54XX_MACCHI: - gen_helper_macchi(t0, cpu_env, t0, t1); - break; - case OPC_VR54XX_MACCHIU: - gen_helper_macchiu(t0, cpu_env, t0, t1); - break; case OPC_VR54XX_MSACHI: gen_helper_msachi(t0, cpu_env, t0, t1); break; diff --git a/target/mips/tcg/vr54xx_translate.c b/target/mips/tcg/vr54xx_translate.c index 13e58fdd8df..85e2ec371b9 100644 --- a/target/mips/tcg/vr54xx_translate.c +++ b/target/mips/tcg/vr54xx_translate.c @@ -17,3 +17,43 @@ /* Include the auto-generated decoder. */ #include "decode-vr54xx.c.inc" + +/* + * Integer Multiply-Accumulate Instructions + * + * MACC Multiply, accumulate, and move LO + * MACCHI Multiply, accumulate, and move HI + * MACCHIU Unsigned multiply, accumulate, and move HI + * MACCU Unsigned multiply, accumulate, and move LO + */ + +typedef void gen_helper_mult_acc_t(TCGv, TCGv_ptr, TCGv, TCGv); + +static bool trans_mult_acc(DisasContext *ctx, arg_r *a, + gen_helper_mult_acc_t *gen_helper_mult_acc) +{ + TCGv t0 = tcg_temp_new(); + TCGv t1 = tcg_temp_new(); + + gen_load_gpr(t0, a->rs); + gen_load_gpr(t1, a->rt); + + gen_helper_mult_acc(t0, cpu_env, t0, t1); + + gen_store_gpr(t0, a->rd); + + tcg_temp_free(t0); + tcg_temp_free(t1); + + return false; +} + +#define MULT_ACC(opcode, gen_helper) \ +static bool trans_##opcode(DisasContext *ctx, arg_r *a) \ +{ \ + return trans_mult_acc(ctx, a, gen_helper); \ +} +MULT_ACC(MACC, gen_helper_macc); +MULT_ACC(MACCHI, gen_helper_macchi); +MULT_ACC(MACCHIU, gen_helper_macchiu); +MULT_ACC(MACCU, gen_helper_maccu);
Convert the following Integer Multiply-Accumulate opcodes: * MACC Multiply, accumulate, and move LO * MACCHI Multiply, accumulate, and move HI * MACCHIU Unsigned multiply, accumulate, and move HI * MACCU Unsigned multiply, accumulate, and move LO Since all opcodes are generated using the same pattern, we add the gen_helper_mult_acc_t typedef and MULT_ACC() macro to remove boilerplate code. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- target/mips/tcg/vr54xx.decode | 9 +++++++ target/mips/tcg/translate.c | 16 ------------ target/mips/tcg/vr54xx_translate.c | 40 ++++++++++++++++++++++++++++++ 3 files changed, 49 insertions(+), 16 deletions(-)