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[86.222.93.116]) by smtp.gmail.com with ESMTPSA id f1sm11819055wri.74.2021.07.11.14.01.08 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 11 Jul 2021 14:01:09 -0700 (PDT) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PULL 09/19] target/mips/tx79: Introduce PPACW opcode (Parallel Pack to Word) Date: Sun, 11 Jul 2021 23:00:06 +0200 Message-Id: <20210711210016.2710100-10-f4bug@amsat.org> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210711210016.2710100-1-f4bug@amsat.org> References: <20210711210016.2710100-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::431; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wr1-x431.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.248, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Mark Cave-Ayland , Fredrik Noring , Richard Henderson , =?utf-8?q?Herv=C3=A9_Pous?= =?utf-8?q?sineau?= , =?utf-8?q?Philippe_Mathieu-Daud?= =?utf-8?q?=C3=A9?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Introduce the PPACW opcode (Parallel Pack to Word). Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: Richard Henderson Message-Id: <20210214175912.732946-22-f4bug@amsat.org> Signed-off-by: Philippe Mathieu-Daudé --- target/mips/tcg/tx79.decode | 1 + target/mips/tcg/tx79_translate.c | 30 ++++++++++++++++++++++++++++++ 2 files changed, 31 insertions(+) diff --git a/target/mips/tcg/tx79.decode b/target/mips/tcg/tx79.decode index 63fbe9694bb..653910371d2 100644 --- a/target/mips/tcg/tx79.decode +++ b/target/mips/tcg/tx79.decode @@ -38,6 +38,7 @@ PCGTH 011100 ..... ..... ..... 00110 001000 @rs_rt_rd PSUBB 011100 ..... ..... ..... 01001 001000 @rs_rt_rd PCGTB 011100 ..... ..... ..... 01010 001000 @rs_rt_rd PEXTLW 011100 ..... ..... ..... 10010 001000 @rs_rt_rd +PPACW 011100 ..... ..... ..... 10011 001000 @rs_rt_rd PEXTLH 011100 ..... ..... ..... 10110 001000 @rs_rt_rd PEXTLB 011100 ..... ..... ..... 11010 001000 @rs_rt_rd diff --git a/target/mips/tcg/tx79_translate.c b/target/mips/tcg/tx79_translate.c index f0e3d8c0b66..90c33d26a9f 100644 --- a/target/mips/tcg/tx79_translate.c +++ b/target/mips/tcg/tx79_translate.c @@ -374,6 +374,36 @@ static bool trans_PCEQW(DisasContext *ctx, arg_rtype *a) * PEXTLW rd, rs, rt Parallel Extend Lower from Word */ +/* Parallel Pack to Word */ +static bool trans_PPACW(DisasContext *ctx, arg_rtype *a) +{ + TCGv_i64 a0, b0, t0; + + if (a->rd == 0) { + /* nop */ + return true; + } + + a0 = tcg_temp_new_i64(); + b0 = tcg_temp_new_i64(); + t0 = tcg_temp_new_i64(); + + gen_load_gpr(a0, a->rs); + gen_load_gpr(b0, a->rt); + + gen_load_gpr_hi(t0, a->rt); /* b1 */ + tcg_gen_deposit_i64(cpu_gpr[a->rd], b0, t0, 32, 32); + + gen_load_gpr_hi(t0, a->rs); /* a1 */ + tcg_gen_deposit_i64(cpu_gpr_hi[a->rd], a0, t0, 32, 32); + + tcg_temp_free(t0); + tcg_temp_free(b0); + tcg_temp_free(a0); + + return true; +} + static void gen_pextw(TCGv_i64 dl, TCGv_i64 dh, TCGv_i64 a, TCGv_i64 b) { tcg_gen_deposit_i64(dl, b, a, 32, 32);