diff mbox series

target/ppc: fold ppc_store_ptcr into it's only caller

Message ID 20210526143516.125582-1-bruno.larsen@eldorado.org.br
State New
Headers show
Series target/ppc: fold ppc_store_ptcr into it's only caller | expand

Commit Message

Bruno Larsen (billionai) May 26, 2021, 2:35 p.m. UTC
ppc_store_ptcr, defined in mmu_helper.c, was only used by
helper_store_ptcr, in misc_helper.c. To avoid possible confusion,
the function was folded into the helper.

Signed-off-by: Bruno Larsen (billionai) <bruno.larsen@eldorado.org.br>
---
 target/ppc/cpu.h         |  1 -
 target/ppc/misc_helper.c | 24 +++++++++++++++++++++++-
 target/ppc/mmu_helper.c  | 28 ----------------------------
 3 files changed, 23 insertions(+), 30 deletions(-)

Comments

David Gibson May 27, 2021, 1:13 a.m. UTC | #1
On Wed, May 26, 2021 at 11:35:16AM -0300, Bruno Larsen (billionai) wrote:
> ppc_store_ptcr, defined in mmu_helper.c, was only used by
> helper_store_ptcr, in misc_helper.c. To avoid possible confusion,
> the function was folded into the helper.
> 
> Signed-off-by: Bruno Larsen (billionai)
> <bruno.larsen@eldorado.org.br>

LGTM, applied to ppc-for-6.1, thanks.

> ---
>  target/ppc/cpu.h         |  1 -
>  target/ppc/misc_helper.c | 24 +++++++++++++++++++++++-
>  target/ppc/mmu_helper.c  | 28 ----------------------------
>  3 files changed, 23 insertions(+), 30 deletions(-)
> 
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 203f07e48e..f39f5e0fff 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -1290,7 +1290,6 @@ bool ppc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
>  
>  #if !defined(CONFIG_USER_ONLY)
>  void ppc_store_sdr1(CPUPPCState *env, target_ulong value);
> -void ppc_store_ptcr(CPUPPCState *env, target_ulong value);
>  #endif /* !defined(CONFIG_USER_ONLY) */
>  void ppc_store_msr(CPUPPCState *env, target_ulong value);
>  void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val);
> diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c
> index 442b12652c..c33f5f39b9 100644
> --- a/target/ppc/misc_helper.c
> +++ b/target/ppc/misc_helper.c
> @@ -23,6 +23,7 @@
>  #include "exec/helper-proto.h"
>  #include "qemu/error-report.h"
>  #include "qemu/main-loop.h"
> +#include "mmu-book3s-v3.h"
>  
>  #include "helper_regs.h"
>  
> @@ -116,7 +117,28 @@ void helper_store_sdr1(CPUPPCState *env, target_ulong val)
>  void helper_store_ptcr(CPUPPCState *env, target_ulong val)
>  {
>      if (env->spr[SPR_PTCR] != val) {
> -        ppc_store_ptcr(env, val);
> +        PowerPCCPU *cpu = env_archcpu(env);
> +        target_ulong ptcr_mask = PTCR_PATB | PTCR_PATS;
> +        target_ulong patbsize = val & PTCR_PATS;
> +
> +        qemu_log_mask(CPU_LOG_MMU, "%s: " TARGET_FMT_lx "\n", __func__, val);
> +
> +        assert(!cpu->vhyp);
> +        assert(env->mmu_model & POWERPC_MMU_3_00);
> +
> +        if (val & ~ptcr_mask) {
> +            error_report("Invalid bits 0x"TARGET_FMT_lx" set in PTCR",
> +                         val & ~ptcr_mask);
> +            val &= ptcr_mask;
> +        }
> +
> +        if (patbsize > 24) {
> +            error_report("Invalid Partition Table size 0x" TARGET_FMT_lx
> +                         " stored in PTCR", patbsize);
> +            return;
> +        }
> +
> +        env->spr[SPR_PTCR] = val;
>          tlb_flush(env_cpu(env));
>      }
>  }
> diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
> index 5395e5ee5a..d45936be49 100644
> --- a/target/ppc/mmu_helper.c
> +++ b/target/ppc/mmu_helper.c
> @@ -1987,34 +1987,6 @@ void ppc_tlb_invalidate_one(CPUPPCState *env, target_ulong addr)
>  
>  /*****************************************************************************/
>  /* Special registers manipulation */
> -#if defined(TARGET_PPC64)
> -void ppc_store_ptcr(CPUPPCState *env, target_ulong value)
> -{
> -    PowerPCCPU *cpu = env_archcpu(env);
> -    target_ulong ptcr_mask = PTCR_PATB | PTCR_PATS;
> -    target_ulong patbsize = value & PTCR_PATS;
> -
> -    qemu_log_mask(CPU_LOG_MMU, "%s: " TARGET_FMT_lx "\n", __func__, value);
> -
> -    assert(!cpu->vhyp);
> -    assert(env->mmu_model & POWERPC_MMU_3_00);
> -
> -    if (value & ~ptcr_mask) {
> -        error_report("Invalid bits 0x"TARGET_FMT_lx" set in PTCR",
> -                     value & ~ptcr_mask);
> -        value &= ptcr_mask;
> -    }
> -
> -    if (patbsize > 24) {
> -        error_report("Invalid Partition Table size 0x" TARGET_FMT_lx
> -                     " stored in PTCR", patbsize);
> -        return;
> -    }
> -
> -    env->spr[SPR_PTCR] = value;
> -}
> -
> -#endif /* defined(TARGET_PPC64) */
>  
>  /* Segment registers load and store */
>  target_ulong helper_load_sr(CPUPPCState *env, target_ulong sr_num)
diff mbox series

Patch

diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 203f07e48e..f39f5e0fff 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -1290,7 +1290,6 @@  bool ppc_cpu_tlb_fill(CPUState *cs, vaddr address, int size,
 
 #if !defined(CONFIG_USER_ONLY)
 void ppc_store_sdr1(CPUPPCState *env, target_ulong value);
-void ppc_store_ptcr(CPUPPCState *env, target_ulong value);
 #endif /* !defined(CONFIG_USER_ONLY) */
 void ppc_store_msr(CPUPPCState *env, target_ulong value);
 void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val);
diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c
index 442b12652c..c33f5f39b9 100644
--- a/target/ppc/misc_helper.c
+++ b/target/ppc/misc_helper.c
@@ -23,6 +23,7 @@ 
 #include "exec/helper-proto.h"
 #include "qemu/error-report.h"
 #include "qemu/main-loop.h"
+#include "mmu-book3s-v3.h"
 
 #include "helper_regs.h"
 
@@ -116,7 +117,28 @@  void helper_store_sdr1(CPUPPCState *env, target_ulong val)
 void helper_store_ptcr(CPUPPCState *env, target_ulong val)
 {
     if (env->spr[SPR_PTCR] != val) {
-        ppc_store_ptcr(env, val);
+        PowerPCCPU *cpu = env_archcpu(env);
+        target_ulong ptcr_mask = PTCR_PATB | PTCR_PATS;
+        target_ulong patbsize = val & PTCR_PATS;
+
+        qemu_log_mask(CPU_LOG_MMU, "%s: " TARGET_FMT_lx "\n", __func__, val);
+
+        assert(!cpu->vhyp);
+        assert(env->mmu_model & POWERPC_MMU_3_00);
+
+        if (val & ~ptcr_mask) {
+            error_report("Invalid bits 0x"TARGET_FMT_lx" set in PTCR",
+                         val & ~ptcr_mask);
+            val &= ptcr_mask;
+        }
+
+        if (patbsize > 24) {
+            error_report("Invalid Partition Table size 0x" TARGET_FMT_lx
+                         " stored in PTCR", patbsize);
+            return;
+        }
+
+        env->spr[SPR_PTCR] = val;
         tlb_flush(env_cpu(env));
     }
 }
diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
index 5395e5ee5a..d45936be49 100644
--- a/target/ppc/mmu_helper.c
+++ b/target/ppc/mmu_helper.c
@@ -1987,34 +1987,6 @@  void ppc_tlb_invalidate_one(CPUPPCState *env, target_ulong addr)
 
 /*****************************************************************************/
 /* Special registers manipulation */
-#if defined(TARGET_PPC64)
-void ppc_store_ptcr(CPUPPCState *env, target_ulong value)
-{
-    PowerPCCPU *cpu = env_archcpu(env);
-    target_ulong ptcr_mask = PTCR_PATB | PTCR_PATS;
-    target_ulong patbsize = value & PTCR_PATS;
-
-    qemu_log_mask(CPU_LOG_MMU, "%s: " TARGET_FMT_lx "\n", __func__, value);
-
-    assert(!cpu->vhyp);
-    assert(env->mmu_model & POWERPC_MMU_3_00);
-
-    if (value & ~ptcr_mask) {
-        error_report("Invalid bits 0x"TARGET_FMT_lx" set in PTCR",
-                     value & ~ptcr_mask);
-        value &= ptcr_mask;
-    }
-
-    if (patbsize > 24) {
-        error_report("Invalid Partition Table size 0x" TARGET_FMT_lx
-                     " stored in PTCR", patbsize);
-        return;
-    }
-
-    env->spr[SPR_PTCR] = value;
-}
-
-#endif /* defined(TARGET_PPC64) */
 
 /* Segment registers load and store */
 target_ulong helper_load_sr(CPUPPCState *env, target_ulong sr_num)