diff mbox series

[v4] hw/ppc: moved has_spr to cpu.h

Message ID 20210507164146.67086-1-lucas.araujo@eldorado.org.br
State New
Headers show
Series [v4] hw/ppc: moved has_spr to cpu.h | expand

Commit Message

Lucas Mateus Martins Araujo e Castro May 7, 2021, 4:41 p.m. UTC
Moved has_spr to cpu.h as ppc_has_spr and turned it into an inline function.
Change spr verification in pnv.c and spapr.c to a version that can
compile in a !TCG environment.

Signed-off-by: Lucas Mateus Castro (alqotel) <lucas.araujo@eldorado.org.br>
---
 hw/ppc/pnv.c         |  2 +-
 hw/ppc/spapr.c       |  4 ++--
 hw/ppc/spapr_hcall.c | 12 +++---------
 target/ppc/cpu.h     |  6 ++++++
 4 files changed, 12 insertions(+), 12 deletions(-)

Comments

Richard Henderson May 7, 2021, 5:20 p.m. UTC | #1
On 5/7/21 9:41 AM, Lucas Mateus Castro (alqotel) wrote:
> Moved has_spr to cpu.h as ppc_has_spr and turned it into an inline function.
> Change spr verification in pnv.c and spapr.c to a version that can
> compile in a !TCG environment.
> 
> Signed-off-by: Lucas Mateus Castro (alqotel)<lucas.araujo@eldorado.org.br>
> ---
>   hw/ppc/pnv.c         |  2 +-
>   hw/ppc/spapr.c       |  4 ++--
>   hw/ppc/spapr_hcall.c | 12 +++---------
>   target/ppc/cpu.h     |  6 ++++++
>   4 files changed, 12 insertions(+), 12 deletions(-)

Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

r~
David Gibson May 8, 2021, 6:42 a.m. UTC | #2
On Fri, May 07, 2021 at 01:41:46PM -0300, Lucas Mateus Castro (alqotel) wrote:
> Moved has_spr to cpu.h as ppc_has_spr and turned it into an inline function.
> Change spr verification in pnv.c and spapr.c to a version that can
> compile in a !TCG environment.
> 
> Signed-off-by: Lucas Mateus Castro (alqotel)
> <lucas.araujo@eldorado.org.br>

Applied to ppc-for-6.1, thanks.

> ---
>  hw/ppc/pnv.c         |  2 +-
>  hw/ppc/spapr.c       |  4 ++--
>  hw/ppc/spapr_hcall.c | 12 +++---------
>  target/ppc/cpu.h     |  6 ++++++
>  4 files changed, 12 insertions(+), 12 deletions(-)
> 
> diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
> index ffe01977cd..d16dd2d080 100644
> --- a/hw/ppc/pnv.c
> +++ b/hw/ppc/pnv.c
> @@ -196,7 +196,7 @@ static void pnv_dt_core(PnvChip *chip, PnvCore *pc, void *fdt)
>      _FDT((fdt_setprop_string(fdt, offset, "status", "okay")));
>      _FDT((fdt_setprop(fdt, offset, "64-bit", NULL, 0)));
>  
> -    if (env->spr_cb[SPR_PURR].oea_read) {
> +    if (ppc_has_spr(cpu, SPR_PURR)) {
>          _FDT((fdt_setprop(fdt, offset, "ibm,purr", NULL, 0)));
>      }
>  
> diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
> index 4db448d63e..c23bcc4490 100644
> --- a/hw/ppc/spapr.c
> +++ b/hw/ppc/spapr.c
> @@ -703,10 +703,10 @@ static void spapr_dt_cpu(CPUState *cs, void *fdt, int offset,
>      _FDT((fdt_setprop_string(fdt, offset, "status", "okay")));
>      _FDT((fdt_setprop(fdt, offset, "64-bit", NULL, 0)));
>  
> -    if (env->spr_cb[SPR_PURR].oea_read) {
> +    if (ppc_has_spr(cpu, SPR_PURR)) {
>          _FDT((fdt_setprop_cell(fdt, offset, "ibm,purr", 1)));
>      }
> -    if (env->spr_cb[SPR_SPURR].oea_read) {
> +    if (ppc_has_spr(cpu, SPR_PURR)) {
>          _FDT((fdt_setprop_cell(fdt, offset, "ibm,spurr", 1)));
>      }
>  
> diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
> index 6dbaa93d15..f25014afda 100644
> --- a/hw/ppc/spapr_hcall.c
> +++ b/hw/ppc/spapr_hcall.c
> @@ -20,12 +20,6 @@
>  #include "mmu-book3s-v3.h"
>  #include "hw/mem/memory-device.h"
>  
> -static bool has_spr(PowerPCCPU *cpu, int spr)
> -{
> -    /* We can test whether the SPR is defined by checking for a valid name */
> -    return cpu->env.spr_cb[spr].name != NULL;
> -}
> -
>  bool is_ram_address(SpaprMachineState *spapr, hwaddr addr)
>  {
>      MachineState *machine = MACHINE(spapr);
> @@ -212,12 +206,12 @@ static target_ulong h_set_sprg0(PowerPCCPU *cpu, SpaprMachineState *spapr,
>  static target_ulong h_set_dabr(PowerPCCPU *cpu, SpaprMachineState *spapr,
>                                 target_ulong opcode, target_ulong *args)
>  {
> -    if (!has_spr(cpu, SPR_DABR)) {
> +    if (!ppc_has_spr(cpu, SPR_DABR)) {
>          return H_HARDWARE;              /* DABR register not available */
>      }
>      cpu_synchronize_state(CPU(cpu));
>  
> -    if (has_spr(cpu, SPR_DABRX)) {
> +    if (ppc_has_spr(cpu, SPR_DABRX)) {
>          cpu->env.spr[SPR_DABRX] = 0x3;  /* Use Problem and Privileged state */
>      } else if (!(args[0] & 0x4)) {      /* Breakpoint Translation set? */
>          return H_RESERVED_DABR;
> @@ -232,7 +226,7 @@ static target_ulong h_set_xdabr(PowerPCCPU *cpu, SpaprMachineState *spapr,
>  {
>      target_ulong dabrx = args[1];
>  
> -    if (!has_spr(cpu, SPR_DABR) || !has_spr(cpu, SPR_DABRX)) {
> +    if (!ppc_has_spr(cpu, SPR_DABR) || !ppc_has_spr(cpu, SPR_DABRX)) {
>          return H_HARDWARE;
>      }
>  
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index a976e7f7b0..98fcf1c4d6 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -2642,6 +2642,12 @@ static inline ppc_avr_t *cpu_avr_ptr(CPUPPCState *env, int i)
>      return (ppc_avr_t *)((uintptr_t)env + avr_full_offset(i));
>  }
>  
> +static inline bool ppc_has_spr(PowerPCCPU *cpu, int spr)
> +{
> +    /* We can test whether the SPR is defined by checking for a valid name */
> +    return cpu->env.spr_cb[spr].name != NULL;
> +}
> +
>  void dump_mmu(CPUPPCState *env);
>  
>  void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len);
diff mbox series

Patch

diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c
index ffe01977cd..d16dd2d080 100644
--- a/hw/ppc/pnv.c
+++ b/hw/ppc/pnv.c
@@ -196,7 +196,7 @@  static void pnv_dt_core(PnvChip *chip, PnvCore *pc, void *fdt)
     _FDT((fdt_setprop_string(fdt, offset, "status", "okay")));
     _FDT((fdt_setprop(fdt, offset, "64-bit", NULL, 0)));
 
-    if (env->spr_cb[SPR_PURR].oea_read) {
+    if (ppc_has_spr(cpu, SPR_PURR)) {
         _FDT((fdt_setprop(fdt, offset, "ibm,purr", NULL, 0)));
     }
 
diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c
index 4db448d63e..c23bcc4490 100644
--- a/hw/ppc/spapr.c
+++ b/hw/ppc/spapr.c
@@ -703,10 +703,10 @@  static void spapr_dt_cpu(CPUState *cs, void *fdt, int offset,
     _FDT((fdt_setprop_string(fdt, offset, "status", "okay")));
     _FDT((fdt_setprop(fdt, offset, "64-bit", NULL, 0)));
 
-    if (env->spr_cb[SPR_PURR].oea_read) {
+    if (ppc_has_spr(cpu, SPR_PURR)) {
         _FDT((fdt_setprop_cell(fdt, offset, "ibm,purr", 1)));
     }
-    if (env->spr_cb[SPR_SPURR].oea_read) {
+    if (ppc_has_spr(cpu, SPR_PURR)) {
         _FDT((fdt_setprop_cell(fdt, offset, "ibm,spurr", 1)));
     }
 
diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c
index 6dbaa93d15..f25014afda 100644
--- a/hw/ppc/spapr_hcall.c
+++ b/hw/ppc/spapr_hcall.c
@@ -20,12 +20,6 @@ 
 #include "mmu-book3s-v3.h"
 #include "hw/mem/memory-device.h"
 
-static bool has_spr(PowerPCCPU *cpu, int spr)
-{
-    /* We can test whether the SPR is defined by checking for a valid name */
-    return cpu->env.spr_cb[spr].name != NULL;
-}
-
 bool is_ram_address(SpaprMachineState *spapr, hwaddr addr)
 {
     MachineState *machine = MACHINE(spapr);
@@ -212,12 +206,12 @@  static target_ulong h_set_sprg0(PowerPCCPU *cpu, SpaprMachineState *spapr,
 static target_ulong h_set_dabr(PowerPCCPU *cpu, SpaprMachineState *spapr,
                                target_ulong opcode, target_ulong *args)
 {
-    if (!has_spr(cpu, SPR_DABR)) {
+    if (!ppc_has_spr(cpu, SPR_DABR)) {
         return H_HARDWARE;              /* DABR register not available */
     }
     cpu_synchronize_state(CPU(cpu));
 
-    if (has_spr(cpu, SPR_DABRX)) {
+    if (ppc_has_spr(cpu, SPR_DABRX)) {
         cpu->env.spr[SPR_DABRX] = 0x3;  /* Use Problem and Privileged state */
     } else if (!(args[0] & 0x4)) {      /* Breakpoint Translation set? */
         return H_RESERVED_DABR;
@@ -232,7 +226,7 @@  static target_ulong h_set_xdabr(PowerPCCPU *cpu, SpaprMachineState *spapr,
 {
     target_ulong dabrx = args[1];
 
-    if (!has_spr(cpu, SPR_DABR) || !has_spr(cpu, SPR_DABRX)) {
+    if (!ppc_has_spr(cpu, SPR_DABR) || !ppc_has_spr(cpu, SPR_DABRX)) {
         return H_HARDWARE;
     }
 
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index a976e7f7b0..98fcf1c4d6 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -2642,6 +2642,12 @@  static inline ppc_avr_t *cpu_avr_ptr(CPUPPCState *env, int i)
     return (ppc_avr_t *)((uintptr_t)env + avr_full_offset(i));
 }
 
+static inline bool ppc_has_spr(PowerPCCPU *cpu, int spr)
+{
+    /* We can test whether the SPR is defined by checking for a valid name */
+    return cpu->env.spr_cb[spr].name != NULL;
+}
+
 void dump_mmu(CPUPPCState *env);
 
 void ppc_maybe_bswap_register(CPUPPCState *env, uint8_t *mem_buf, int len);