From patchwork Wed May 5 07:35:37 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Mark Cave-Ayland X-Patchwork-Id: 1474129 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FZpZ26NSHz9sCD for ; Wed, 5 May 2021 17:41:46 +1000 (AEST) Received: from localhost ([::1]:50926 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1leCAC-00071i-TV for incoming@patchwork.ozlabs.org; Wed, 05 May 2021 03:41:44 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:52958) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1leC4i-0007jB-25 for qemu-devel@nongnu.org; Wed, 05 May 2021 03:36:04 -0400 Received: from mail.ilande.co.uk ([2001:41c9:1:41f::167]:57724 helo=mail.default.ilande.uk0.bigv.io) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1leC4f-0002EX-QE for qemu-devel@nongnu.org; Wed, 05 May 2021 03:36:03 -0400 Received: from host81-154-26-71.range81-154.btcentralplus.com ([81.154.26.71] helo=kentang.home) by mail.default.ilande.uk0.bigv.io with esmtpsa (TLS1.3:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.92) (envelope-from ) id 1leC4c-0000OI-Ha; Wed, 05 May 2021 08:36:00 +0100 From: Mark Cave-Ayland To: peter.maydell@linaro.org, qemu-devel@nongnu.org Date: Wed, 5 May 2021 08:35:37 +0100 Message-Id: <20210505073538.11438-10-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20210505073538.11438-1-mark.cave-ayland@ilande.co.uk> References: <20210505073538.11438-1-mark.cave-ayland@ilande.co.uk> MIME-Version: 1.0 X-SA-Exim-Connect-IP: 81.154.26.71 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk Subject: [PULL 09/10] hw/sparc64: Fix code style for checkpatch.pl X-SA-Exim-Version: 4.2.1 (built Wed, 08 May 2019 21:11:16 +0000) X-SA-Exim-Scanned: Yes (on mail.default.ilande.uk0.bigv.io) Received-SPF: pass client-ip=2001:41c9:1:41f::167; envelope-from=mark.cave-ayland@ilande.co.uk; helo=mail.default.ilande.uk0.bigv.io X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Philippe Mathieu-Daudé We are going to move this code, fix its style first. Signed-off-by: Philippe Mathieu-Daudé Reviewed-by: KONRAD Frederic Reviewed-by: Mark Cave-Ayland Reviewed-by: Richard Henderson Message-Id: <20210428141655.387430-4-f4bug@amsat.org> Signed-off-by: Mark Cave-Ayland --- hw/sparc64/sparc64.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/hw/sparc64/sparc64.c b/hw/sparc64/sparc64.c index cc0b9bd30d..fd29a79edc 100644 --- a/hw/sparc64/sparc64.c +++ b/hw/sparc64/sparc64.c @@ -48,14 +48,18 @@ void cpu_check_irqs(CPUSPARCState *env) return; } cs = env_cpu(env); - /* check if TM or SM in SOFTINT are set - setting these also causes interrupt 14 */ + /* + * check if TM or SM in SOFTINT are set + * setting these also causes interrupt 14 + */ if (env->softint & (SOFTINT_TIMER | SOFTINT_STIMER)) { pil |= 1 << 14; } - /* The bit corresponding to psrpil is (1<< psrpil), the next bit - is (2 << psrpil). */ + /* + * The bit corresponding to psrpil is (1<< psrpil), + * the next bit is (2 << psrpil). + */ if (pil < (2 << env->psrpil)) { if (cs->interrupt_request & CPU_INTERRUPT_HARD) { trace_sparc64_cpu_check_irqs_reset_irq(env->interrupt_index);