Message ID | 20210503221327.3068768-12-alistair.francis@wdc.com |
---|---|
State | New |
Headers | show
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03 May 2021 14:54:27 -0700 IronPort-SDR: 35d1IpJM2fJidJrpQ4HfVOX/dOaKVS1Wqz+aRhvKhwbxmcLRXXXk6M78ATtw+E3pRxmA6a0bm/ ItKz8i52EruWZFtkxY++Xx2UZnhaWmKJxI1Ii+94GNUNE4In88w3yj7gq8VQora2oI7XEoPIqi OnTa24LXn8fikK7sfiMn5+6oEDs8GQ2Z05yQJPePPz5JPj3kn3L2qhIkp9qxV035zN6YO0hcal Twwg428od6jv7qcMWFMwSlnIiiSNg0M1c+dkSB/bTliD78GlGYLhL/yjJEK9v79NutxVllDi0L 4aU= WDCIronportException: Internal Received: from unknown (HELO alistair-risc6-laptop.wdc.com) ([10.225.165.45]) by uls-op-cesaip01.wdc.com with ESMTP; 03 May 2021 15:14:13 -0700 From: Alistair Francis <alistair.francis@wdc.com> To: peter.maydell@linaro.org Subject: [PULL 11/42] target/riscv: Fix 32-bit HS mode access permissions Date: Tue, 4 May 2021 08:12:56 +1000 Message-Id: <20210503221327.3068768-12-alistair.francis@wdc.com> X-Mailer: git-send-email 2.31.1 In-Reply-To: <20210503221327.3068768-1-alistair.francis@wdc.com> References: <20210503221327.3068768-1-alistair.francis@wdc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=68.232.141.245; envelope-from=prvs=750139ea6=alistair.francis@wdc.com; helo=esa1.hgst.iphmx.com X-Spam_score_int: -43 X-Spam_score: -4.4 X-Spam_bar: ---- X-Spam_report: (-4.4 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_MED=-2.3, SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Cc: alistair23@gmail.com, Richard Henderson <richard.henderson@linaro.org>, Alistair Francis <alistair.francis@wdc.com>, qemu-devel@nongnu.org, Bin Meng <bmeng.cn@gmail.com> Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org> |
Series |
[PULL,01/42] target/riscv: Remove privilege v1.9 specific CSR related code
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diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 1938bdca7d..6a39c4aa96 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -181,7 +181,11 @@ static RISCVException hmode(CPURISCVState *env, int csrno) static RISCVException hmode32(CPURISCVState *env, int csrno) { if (!riscv_cpu_is_32bit(env)) { - return RISCV_EXCP_NONE; + if (riscv_cpu_virt_enabled(env)) { + return RISCV_EXCP_ILLEGAL_INST; + } else { + return RISCV_EXCP_VIRT_INSTRUCTION_FAULT; + } } return hmode(env, csrno);