From patchwork Fri Apr 16 16:27:34 2021 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudio Fontana X-Patchwork-Id: 1467157 Return-Path: X-Original-To: incoming@patchwork.ozlabs.org Delivered-To: patchwork-incoming@bilbo.ozlabs.org Authentication-Results: ozlabs.org; spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org (client-ip=209.51.188.17; helo=lists.gnu.org; envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org; receiver=) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ozlabs.org (Postfix) with ESMTPS id 4FMMtb0hdMz9sRR for ; Sat, 17 Apr 2021 03:01:27 +1000 (AEST) Received: from localhost ([::1]:60450 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1lXRqO-0002XX-RL for incoming@patchwork.ozlabs.org; Fri, 16 Apr 2021 13:01:24 -0400 Received: from eggs.gnu.org ([2001:470:142:3::10]:46490) by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lXRL9-0004Fi-GN for qemu-devel@nongnu.org; Fri, 16 Apr 2021 12:29:07 -0400 Received: from mx2.suse.de ([195.135.220.15]:44334) by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256) (Exim 4.90_1) (envelope-from ) id 1lXRL1-0001Sr-Te for qemu-devel@nongnu.org; Fri, 16 Apr 2021 12:29:07 -0400 X-Virus-Scanned: by amavisd-new at test-mx.suse.de Received: from relay2.suse.de (unknown [195.135.221.27]) by mx2.suse.de (Postfix) with ESMTP id 4A2CDB1C9; Fri, 16 Apr 2021 16:28:40 +0000 (UTC) From: Claudio Fontana To: Peter Maydell , =?utf-8?q?Philippe_Mathieu-Dau?= =?utf-8?q?d=C3=A9?= , Richard Henderson , =?utf-8?q?Alex_Benn=C3=A9?= =?utf-8?q?e?= Subject: [RFC v14 30/80] target/arm: fixup sve_exception_el code style before move Date: Fri, 16 Apr 2021 18:27:34 +0200 Message-Id: <20210416162824.25131-31-cfontana@suse.de> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210416162824.25131-1-cfontana@suse.de> References: <20210416162824.25131-1-cfontana@suse.de> MIME-Version: 1.0 Received-SPF: pass client-ip=195.135.220.15; envelope-from=cfontana@suse.de; helo=mx2.suse.de X-Spam_score_int: -41 X-Spam_score: -4.2 X-Spam_bar: ---- X-Spam_report: (-4.2 / 5.0 requ) BAYES_00=-1.9, RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_MSPIKE_H3=0.001, RCVD_IN_MSPIKE_WL=0.001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Roman Bolshakov , Claudio Fontana , Eduardo Habkost , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" before moving over sve_exception_el from the helper code, cleanup the style. Signed-off-by: Claudio Fontana Reviewed-by: Richard Henderson --- target/arm/tcg/helper.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/target/arm/tcg/helper.c b/target/arm/tcg/helper.c index 5ec8f9c005..e4f18bcaa7 100644 --- a/target/arm/tcg/helper.c +++ b/target/arm/tcg/helper.c @@ -261,7 +261,8 @@ static int arm_gdb_set_svereg(CPUARMState *env, uint8_t *buf, int reg) } #endif /* TARGET_AARCH64 */ -/* Return the exception level to which exceptions should be taken +/* + * Return the exception level to which exceptions should be taken * via SVEAccessTrap. If an exception should be routed through * AArch64.AdvSIMDFPAccessTrap, return 0; fp_exception_el should * take care of raising that exception. @@ -275,7 +276,8 @@ int sve_exception_el(CPUARMState *env, int el) if (el <= 1 && (hcr_el2 & (HCR_E2H | HCR_TGE)) != (HCR_E2H | HCR_TGE)) { bool disabled = false; - /* The CPACR.ZEN controls traps to EL1: + /* + * The CPACR.ZEN controls traps to EL1: * 0, 2 : trap EL0 and EL1 accesses * 1 : trap only EL0 accesses * 3 : trap no accesses @@ -301,7 +303,8 @@ int sve_exception_el(CPUARMState *env, int el) } } - /* CPTR_EL2. Since TZ and TFP are positive, + /* + * CPTR_EL2. Since TZ and TFP are positive, * they will be zero when EL2 is not present. */ if (el <= 2 && arm_is_el2_enabled(env)) {