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Sun, 11 Apr 2021 08:14:48 -0400 X-MC-Unique: Oc75DSfZMGepu9mcYJvVyQ-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 6A5CA8030A1; Sun, 11 Apr 2021 12:14:46 +0000 (UTC) Received: from laptop.redhat.com (ovpn-112-22.ams2.redhat.com [10.36.112.22]) by smtp.corp.redhat.com (Postfix) with ESMTP id 5371110023B2; Sun, 11 Apr 2021 12:14:38 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, qemu-devel@nongnu.org, qemu-arm@nongnu.org, alex.williamson@redhat.com Subject: [RFC v9 28/29] pci: Add return_page_response pci ops Date: Sun, 11 Apr 2021 14:09:11 +0200 Message-Id: <20210411120912.15770-29-eric.auger@redhat.com> In-Reply-To: <20210411120912.15770-1-eric.auger@redhat.com> References: <20210411120912.15770-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=eric.auger@redhat.com X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=170.10.133.124; envelope-from=eric.auger@redhat.com; helo=us-smtp-delivery-124.mimecast.com X-Spam_score_int: -27 X-Spam_score: -2.8 X-Spam_bar: -- X-Spam_report: (-2.8 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H4=-0.01, RCVD_IN_MSPIKE_WL=-0.01, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, jacob.jun.pan@linux.intel.com, jean-philippe@linaro.org, tn@semihalf.com, chenxiang66@hisilicon.com, jiangkunkun@huawei.com, shameerali.kolothum.thodi@huawei.com, nicoleotsuka@gmail.com, vivek.gautam@arm.com, vdumpa@nvidia.com, yi.l.liu@intel.com, peterx@redhat.com, zhangfei.gao@gmail.com, yuzenghui@huawei.com, zhukeqian1@huawei.com Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Add a new PCI operation that allows to return page responses to registered VFIO devices Signed-off-by: Eric Auger --- include/hw/iommu/iommu.h | 8 ++++++++ include/hw/pci/pci.h | 4 ++++ hw/pci/pci.c | 16 ++++++++++++++++ 3 files changed, 28 insertions(+) diff --git a/include/hw/iommu/iommu.h b/include/hw/iommu/iommu.h index 12092bda7b..5890f095b1 100644 --- a/include/hw/iommu/iommu.h +++ b/include/hw/iommu/iommu.h @@ -24,5 +24,13 @@ typedef struct IOMMUConfig { }; } IOMMUConfig; +typedef struct IOMMUPageResponse { + union { +#ifdef __linux__ + struct iommu_page_response resp; +#endif + }; +} IOMMUPageResponse; + #endif /* QEMU_HW_IOMMU_IOMMU_H */ diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 1f73c04975..9bc0919352 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -268,6 +268,8 @@ typedef struct PCIReqIDCache PCIReqIDCache; struct PCIPASIDOps { int (*set_pasid_table)(PCIBus *bus, int32_t devfn, IOMMUConfig *config); + int (*return_page_response)(PCIBus *bus, int32_t devfn, + IOMMUPageResponse *resp); }; typedef struct PCIPASIDOps PCIPASIDOps; @@ -501,6 +503,8 @@ void pci_setup_iommu(PCIBus *bus, PCIIOMMUFunc fn, void *opaque); void pci_setup_pasid_ops(PCIDevice *dev, PCIPASIDOps *ops); bool pci_device_is_pasid_ops_set(PCIBus *bus, int32_t devfn); int pci_device_set_pasid_table(PCIBus *bus, int32_t devfn, IOMMUConfig *config); +int pci_device_return_page_response(PCIBus *bus, int32_t devfn, + IOMMUPageResponse *resp); static inline void pci_set_byte(uint8_t *config, uint8_t val) diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 114855a0ac..18d84ff42e 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -2765,6 +2765,22 @@ int pci_device_set_pasid_table(PCIBus *bus, int32_t devfn, return -ENOENT; } +int pci_device_return_page_response(PCIBus *bus, int32_t devfn, + IOMMUPageResponse *resp) +{ + PCIDevice *dev; + + if (!bus) { + return -EINVAL; + } + + dev = bus->devices[devfn]; + if (dev && dev->pasid_ops && dev->pasid_ops->return_page_response) { + return dev->pasid_ops->return_page_response(bus, devfn, resp); + } + return -ENOENT; +} + static void pci_dev_get_w64(PCIBus *b, PCIDevice *dev, void *opaque) { Range *range = opaque;