| Message ID | 20210409150527.15053-2-peter.maydell@linaro.org |
|---|---|
| State | New |
| Headers | show |
| Series | mps3-an524: Fix MPC setting for SRAM block | expand |
On 4/9/21 5:05 PM, Peter Maydell wrote: > The AN524 has three MPCs: one for the BRAM, one for the QSPI flash, > and one for the DDR. We incorrectly set the .mpc field in the > RAMInfo struct for the SRAM block to 1, giving it the same MPC we are > using for the QSPI. The effect of this was that the QSPI didn't get > mapped into the system address space at all, via an MPC or otherwise, > and guest programs which tried to read from the QSPI would get a bus > error. Correct the SRAM RAMInfo to indicate that it does not have an > associated MPC. > Fixes: 25ff112a8cc ("hw/arm/mps2-tz: Add new mps3-an524 board") > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > --- > hw/arm/mps2-tz.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index 3fbe3d29f95..5ebd671bf83 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -238,7 +238,7 @@ static const RAMInfo an524_raminfo[] = { { .name = "sram", .base = 0x20000000, .size = 32 * 4 * KiB, - .mpc = 1, + .mpc = -1, .mrindex = 1, }, { /* We don't model QSPI flash yet; for now expose it as simple ROM */
The AN524 has three MPCs: one for the BRAM, one for the QSPI flash, and one for the DDR. We incorrectly set the .mpc field in the RAMInfo struct for the SRAM block to 1, giving it the same MPC we are using for the QSPI. The effect of this was that the QSPI didn't get mapped into the system address space at all, via an MPC or otherwise, and guest programs which tried to read from the QSPI would get a bus error. Correct the SRAM RAMInfo to indicate that it does not have an associated MPC. Signed-off-by: Peter Maydell <peter.maydell@linaro.org> --- hw/arm/mps2-tz.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)