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[83.57.175.68]) by smtp.gmail.com with ESMTPSA id w24sm11633219edu.2.2021.02.22.06.15.42 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 22 Feb 2021 06:15:43 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH v4 5/8] hw/timer: Introduce SH_TIMER Kconfig entry Date: Mon, 22 Feb 2021 15:15:11 +0100 Message-Id: <20210222141514.2646278-6-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210222141514.2646278-1-f4bug@amsat.org> References: <20210222141514.2646278-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::633; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-ej1-x633.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.25, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , Peter Maydell , Yoshinori Sato , qemu-block@nongnu.org, Magnus Damm , =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= , Max Reitz , =?utf-8?q?Marc-Andr=C3=A9_Lureau?= , Paolo Bonzini , =?utf-8?q?Alex_Benn=C3=A9e?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" We want to be able to use the 'SH4' config for architecture specific features. Add more fine-grained selection by adding a CONFIG_SH_TIMER selector for the SH4 timer control unit. Add the missing MAINTAINERS entries. Suggested-by: Peter Maydell Reviewed-by: Peter Maydell Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 2 ++ hw/sh4/Kconfig | 2 +- hw/timer/Kconfig | 4 ++++ hw/timer/meson.build | 2 +- 4 files changed, 8 insertions(+), 2 deletions(-) diff --git a/MAINTAINERS b/MAINTAINERS index b53a937714a..a03557f4f7c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1391,6 +1391,7 @@ S: Odd Fixes F: hw/char/sh_serial.c F: hw/sh4/r2d.c F: hw/intc/sh_intc.c +F: hw/timer/sh_timer.c F: include/hw/sh4/sh_intc.h Shix @@ -1400,6 +1401,7 @@ S: Odd Fixes F: hw/char/sh_serial.c F: hw/sh4/shix.c F: hw/intc/sh_intc.c +F: hw/timer/sh_timer.c F: include/hw/sh4/sh_intc.h SPARC Machines diff --git a/hw/sh4/Kconfig b/hw/sh4/Kconfig index 47240aa97b7..e569470a614 100644 --- a/hw/sh4/Kconfig +++ b/hw/sh4/Kconfig @@ -21,7 +21,7 @@ config SH7750 bool select SH_INTC select SH_SCI + select SH_TIMER config SH4 bool - select PTIMER diff --git a/hw/timer/Kconfig b/hw/timer/Kconfig index 8749edfb6a5..18936ef55bf 100644 --- a/hw/timer/Kconfig +++ b/hw/timer/Kconfig @@ -36,6 +36,10 @@ config CMSDK_APB_DUALTIMER bool select PTIMER +config SH_TIMER + bool + select PTIMER + config RENESAS_TMR bool diff --git a/hw/timer/meson.build b/hw/timer/meson.build index be343f68fed..26c2701fd78 100644 --- a/hw/timer/meson.build +++ b/hw/timer/meson.build @@ -30,7 +30,7 @@ softmmu_ss.add(when: 'CONFIG_PUV3', if_true: files('puv3_ost.c')) softmmu_ss.add(when: 'CONFIG_PXA2XX', if_true: files('pxa2xx_timer.c')) softmmu_ss.add(when: 'CONFIG_RASPI', if_true: files('bcm2835_systmr.c')) -softmmu_ss.add(when: 'CONFIG_SH4', if_true: files('sh_timer.c')) +softmmu_ss.add(when: 'CONFIG_SH_TIMER', if_true: files('sh_timer.c')) softmmu_ss.add(when: 'CONFIG_SLAVIO', if_true: files('slavio_timer.c')) softmmu_ss.add(when: 'CONFIG_STM32F2XX_TIMER', if_true: files('stm32f2xx_timer.c')) softmmu_ss.add(when: 'CONFIG_XILINX', if_true: files('xilinx_timer.c'))