Message ID | 20210208065700.19454-5-rebecca@nuviainc.com |
---|---|
State | New |
Headers | show
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[174.52.16.57]) by smtp.gmail.com with ESMTPSA id c19sm8335904ile.17.2021.02.07.22.57.07 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Sun, 07 Feb 2021 22:57:07 -0800 (PST) From: Rebecca Cran <rebecca@nuviainc.com> To: qemu-devel@nongnu.org Subject: [PATCH v5 4/4] target/arm: Set ID_PFR0.DIT to 1 for "max" 32-bit CPU Date: Sun, 7 Feb 2021 23:57:00 -0700 Message-Id: <20210208065700.19454-5-rebecca@nuviainc.com> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20210208065700.19454-1-rebecca@nuviainc.com> References: <20210208065700.19454-1-rebecca@nuviainc.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Received-SPF: pass client-ip=2607:f8b0:4864:20::d2d; envelope-from=rebecca@nuviainc.com; helo=mail-io1-xd2d.google.com X-Spam_score_int: -18 X-Spam_score: -1.9 X-Spam_bar: - X-Spam_report: (-1.9 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: <qemu-devel.nongnu.org> List-Unsubscribe: <https://lists.nongnu.org/mailman/options/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe> List-Archive: <https://lists.nongnu.org/archive/html/qemu-devel> List-Post: <mailto:qemu-devel@nongnu.org> List-Help: <mailto:qemu-devel-request@nongnu.org?subject=help> List-Subscribe: <https://lists.nongnu.org/mailman/listinfo/qemu-devel>, <mailto:qemu-devel-request@nongnu.org?subject=subscribe> Cc: Peter Maydell <peter.maydell@linaro.org>, Rebecca Cran <rebecca@nuviainc.com>, Richard Henderson <richard.henderson@linaro.org> Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" <qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org> |
Series |
target/arm: Add support for FEAT_DIT, Data Independent Timing
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expand
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diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 8ddb2556f8cf..5cf6c056c50f 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -2202,6 +2202,10 @@ static void arm_max_initfn(Object *obj) t = FIELD_DP32(t, ID_MMFR4, CNP, 1); /* TTCNP */ t = FIELD_DP32(t, ID_MMFR4, XNX, 1); /* TTS2UXN */ cpu->isar.id_mmfr4 = t; + + t = cpu->isar.id_pfr0; + t = FIELD_DP32(t, ID_PFR0, DIT, 1); + cpu->isar.id_pfr0 = t; } #endif }