| Message ID | 20210201100903.17309-5-cfontana@suse.de |
|---|---|
| State | New |
| Headers | show |
| Series | i386 cleanup PART 2 | expand |
Claudio Fontana <cfontana@suse.de> writes: > From: Eduardo Habkost <ehabkost@redhat.com> > > Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> > > [claudio: wrapped target code in CONFIG_TCG] > Signed-off-by: Claudio Fontana <cfontana@suse.de> > --- > include/hw/core/cpu.h | 20 +++++++++++--------- > accel/tcg/cpu-exec.c | 4 ++-- > target/arm/cpu.c | 4 +++- > target/avr/cpu.c | 2 +- > target/hppa/cpu.c | 2 +- > target/i386/tcg/tcg-cpu.c | 2 +- > target/microblaze/cpu.c | 2 +- > target/mips/cpu.c | 4 +++- > target/riscv/cpu.c | 2 +- > target/rx/cpu.c | 2 +- > target/sh4/cpu.c | 2 +- > target/sparc/cpu.c | 2 +- > target/tricore/cpu.c | 2 +- > 13 files changed, 28 insertions(+), 22 deletions(-) > > diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h > index d0b17dcc4c..b9803885e5 100644 > --- a/include/hw/core/cpu.h > +++ b/include/hw/core/cpu.h > @@ -86,6 +86,17 @@ typedef struct TcgCpuOperations { > * Called when the first CPU is realized. > */ > void (*initialize)(void); > + /** > + * @synchronize_from_tb: Synchronize state from a TCG #TranslationBlock > + * > + * This is called when we abandon execution of a TB before > + * starting it, and must set all parts of the CPU state which > + * the previous TB in the chain may not have updated. This > + * will need to do more. If this hook is not implemented then > + * the default is to call @set_pc(tb->pc). > + */ > + void (*synchronize_from_tb)(CPUState *cpu, > + const struct TranslationBlock *tb); Did you miss my comment last time or just not think it flowed better? ...TB in the chain may not have updated. By default when no hook is defined a call is made to @set_pc(tb->pc). If more state needs to be restored the front-end must provide a hook function and restore all the state there. Either way: Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
On 2/3/21 11:11 AM, Alex Bennée wrote: > > Claudio Fontana <cfontana@suse.de> writes: > >> From: Eduardo Habkost <ehabkost@redhat.com> >> >> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> >> >> [claudio: wrapped target code in CONFIG_TCG] >> Signed-off-by: Claudio Fontana <cfontana@suse.de> >> --- >> include/hw/core/cpu.h | 20 +++++++++++--------- >> accel/tcg/cpu-exec.c | 4 ++-- >> target/arm/cpu.c | 4 +++- >> target/avr/cpu.c | 2 +- >> target/hppa/cpu.c | 2 +- >> target/i386/tcg/tcg-cpu.c | 2 +- >> target/microblaze/cpu.c | 2 +- >> target/mips/cpu.c | 4 +++- >> target/riscv/cpu.c | 2 +- >> target/rx/cpu.c | 2 +- >> target/sh4/cpu.c | 2 +- >> target/sparc/cpu.c | 2 +- >> target/tricore/cpu.c | 2 +- >> 13 files changed, 28 insertions(+), 22 deletions(-) >> >> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h >> index d0b17dcc4c..b9803885e5 100644 >> --- a/include/hw/core/cpu.h >> +++ b/include/hw/core/cpu.h >> @@ -86,6 +86,17 @@ typedef struct TcgCpuOperations { >> * Called when the first CPU is realized. >> */ >> void (*initialize)(void); >> + /** >> + * @synchronize_from_tb: Synchronize state from a TCG #TranslationBlock >> + * >> + * This is called when we abandon execution of a TB before >> + * starting it, and must set all parts of the CPU state which >> + * the previous TB in the chain may not have updated. This >> + * will need to do more. If this hook is not implemented then >> + * the default is to call @set_pc(tb->pc). >> + */ >> + void (*synchronize_from_tb)(CPUState *cpu, >> + const struct TranslationBlock *tb); > > Did you miss my comment last time or just not think it flowed better? > > ...TB in the chain may not have updated. By default when no hook is > defined a call is made to @set_pc(tb->pc). If more state needs to be > restored the front-end must provide a hook function and restore all the > state there. > > Either way: > > Reviewed-by: Alex Bennée <alex.bennee@linaro.org> > Hi Alex, sorry for missing this change, can add it for the next respin, and thanks for looking at this, Ciao, Claudio
On 2/3/21 1:31 PM, Claudio Fontana wrote: > On 2/3/21 11:11 AM, Alex Bennée wrote: >> >> Claudio Fontana <cfontana@suse.de> writes: >> >>> From: Eduardo Habkost <ehabkost@redhat.com> >>> >>> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> >>> >>> [claudio: wrapped target code in CONFIG_TCG] >>> Signed-off-by: Claudio Fontana <cfontana@suse.de> >>> --- >>> include/hw/core/cpu.h | 20 +++++++++++--------- >>> accel/tcg/cpu-exec.c | 4 ++-- >>> target/arm/cpu.c | 4 +++- >>> target/avr/cpu.c | 2 +- >>> target/hppa/cpu.c | 2 +- >>> target/i386/tcg/tcg-cpu.c | 2 +- >>> target/microblaze/cpu.c | 2 +- >>> target/mips/cpu.c | 4 +++- >>> target/riscv/cpu.c | 2 +- >>> target/rx/cpu.c | 2 +- >>> target/sh4/cpu.c | 2 +- >>> target/sparc/cpu.c | 2 +- >>> target/tricore/cpu.c | 2 +- >>> 13 files changed, 28 insertions(+), 22 deletions(-) >>> >>> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h >>> index d0b17dcc4c..b9803885e5 100644 >>> --- a/include/hw/core/cpu.h >>> +++ b/include/hw/core/cpu.h >>> @@ -86,6 +86,17 @@ typedef struct TcgCpuOperations { >>> * Called when the first CPU is realized. >>> */ >>> void (*initialize)(void); >>> + /** >>> + * @synchronize_from_tb: Synchronize state from a TCG #TranslationBlock >>> + * >>> + * This is called when we abandon execution of a TB before >>> + * starting it, and must set all parts of the CPU state which >>> + * the previous TB in the chain may not have updated. This >>> + * will need to do more. If this hook is not implemented then >>> + * the default is to call @set_pc(tb->pc). >>> + */ >>> + void (*synchronize_from_tb)(CPUState *cpu, >>> + const struct TranslationBlock *tb); >> >> Did you miss my comment last time or just not think it flowed better? >> >> ...TB in the chain may not have updated. By default when no hook is >> defined a call is made to @set_pc(tb->pc). If more state needs to be >> restored the front-end must provide a hook function and restore all the >> state there. >> >> Either way: >> >> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> >> > > Hi Alex, sorry for missing this change, can add it for the next respin, > > and thanks for looking at this, > > Ciao, > > Claudio /** * @synchronize_from_tb: Synchronize state from a TCG #TranslationBlock * * This is called when we abandon execution of a TB before starting it, * and must set all parts of the CPU state which the previous TB in the * chain may not have updated. * By default, when this is NULL, a call is made to @set_pc(tb->pc). * * If more state needs to be restored, the target must implement a * function to restore all the state, and register it here. */ I changed the wording a bit, because to me it is easier to think about "target" than about "front-end", but maybe I am missing something. I am also not in love with the term hook, we are trying to end up with a proper interface, as we complete this series, a nice struct that the target can provide with all the functions necessary to implement the TCG operations. Let me know if this requires additional revision, Ciao, CLaudio
Claudio Fontana <cfontana@suse.de> writes: > On 2/3/21 1:31 PM, Claudio Fontana wrote: >> On 2/3/21 11:11 AM, Alex Bennée wrote: >>> >>> Claudio Fontana <cfontana@suse.de> writes: >>> >>>> From: Eduardo Habkost <ehabkost@redhat.com> >>>> >>>> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com> >>>> >>>> [claudio: wrapped target code in CONFIG_TCG] >>>> Signed-off-by: Claudio Fontana <cfontana@suse.de> >>>> --- >>>> include/hw/core/cpu.h | 20 +++++++++++--------- >>>> accel/tcg/cpu-exec.c | 4 ++-- >>>> target/arm/cpu.c | 4 +++- >>>> target/avr/cpu.c | 2 +- >>>> target/hppa/cpu.c | 2 +- >>>> target/i386/tcg/tcg-cpu.c | 2 +- >>>> target/microblaze/cpu.c | 2 +- >>>> target/mips/cpu.c | 4 +++- >>>> target/riscv/cpu.c | 2 +- >>>> target/rx/cpu.c | 2 +- >>>> target/sh4/cpu.c | 2 +- >>>> target/sparc/cpu.c | 2 +- >>>> target/tricore/cpu.c | 2 +- >>>> 13 files changed, 28 insertions(+), 22 deletions(-) >>>> >>>> diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h >>>> index d0b17dcc4c..b9803885e5 100644 >>>> --- a/include/hw/core/cpu.h >>>> +++ b/include/hw/core/cpu.h >>>> @@ -86,6 +86,17 @@ typedef struct TcgCpuOperations { >>>> * Called when the first CPU is realized. >>>> */ >>>> void (*initialize)(void); >>>> + /** >>>> + * @synchronize_from_tb: Synchronize state from a TCG #TranslationBlock >>>> + * >>>> + * This is called when we abandon execution of a TB before >>>> + * starting it, and must set all parts of the CPU state which >>>> + * the previous TB in the chain may not have updated. This >>>> + * will need to do more. If this hook is not implemented then >>>> + * the default is to call @set_pc(tb->pc). >>>> + */ >>>> + void (*synchronize_from_tb)(CPUState *cpu, >>>> + const struct TranslationBlock *tb); >>> >>> Did you miss my comment last time or just not think it flowed better? >>> >>> ...TB in the chain may not have updated. By default when no hook is >>> defined a call is made to @set_pc(tb->pc). If more state needs to be >>> restored the front-end must provide a hook function and restore all the >>> state there. >>> >>> Either way: >>> >>> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> >>> >> >> Hi Alex, sorry for missing this change, can add it for the next respin, >> >> and thanks for looking at this, >> >> Ciao, >> >> Claudio > > /** > * @synchronize_from_tb: Synchronize state from a TCG #TranslationBlock > * > * This is called when we abandon execution of a TB before starting it, > * and must set all parts of the CPU state which the previous TB in the > * chain may not have updated. > * By default, when this is NULL, a call is made to @set_pc(tb->pc). > * > * If more state needs to be restored, the target must implement a > * function to restore all the state, and register it here. > */ > > > I changed the wording a bit, because to me it is easier to think about "target" than about "front-end", but maybe I am missing something. > I am also not in love with the term hook, we are trying to end up with a proper interface, as we complete this series, > a nice struct that the target can provide with all the functions necessary to implement the TCG operations. > > Let me know if this requires additional revision, LGTM
diff --git a/include/hw/core/cpu.h b/include/hw/core/cpu.h index d0b17dcc4c..b9803885e5 100644 --- a/include/hw/core/cpu.h +++ b/include/hw/core/cpu.h @@ -86,6 +86,17 @@ typedef struct TcgCpuOperations { * Called when the first CPU is realized. */ void (*initialize)(void); + /** + * @synchronize_from_tb: Synchronize state from a TCG #TranslationBlock + * + * This is called when we abandon execution of a TB before + * starting it, and must set all parts of the CPU state which + * the previous TB in the chain may not have updated. This + * will need to do more. If this hook is not implemented then + * the default is to call @set_pc(tb->pc). + */ + void (*synchronize_from_tb)(CPUState *cpu, + const struct TranslationBlock *tb); } TcgCpuOperations; @@ -119,13 +130,6 @@ typedef struct TcgCpuOperations { * If the target behaviour here is anything other than "set * the PC register to the value passed in" then the target must * also implement the synchronize_from_tb hook. - * @synchronize_from_tb: Callback for synchronizing state from a TCG - * #TranslationBlock. This is called when we abandon execution - * of a TB before starting it, and must set all parts of the CPU - * state which the previous TB in the chain may not have updated. - * This always includes at least the program counter; some targets - * will need to do more. If this hook is not implemented then the - * default is to call @set_pc(tb->pc). * @tlb_fill: Callback for handling a softmmu tlb miss or user-only * address fault. For system mode, if the access is valid, call * tlb_set_page and return true; if the access is invalid, and @@ -202,8 +206,6 @@ struct CPUClass { void (*get_memory_mapping)(CPUState *cpu, MemoryMappingList *list, Error **errp); void (*set_pc)(CPUState *cpu, vaddr value); - void (*synchronize_from_tb)(CPUState *cpu, - const struct TranslationBlock *tb); bool (*tlb_fill)(CPUState *cpu, vaddr address, int size, MMUAccessType access_type, int mmu_idx, bool probe, uintptr_t retaddr); diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 5628a156d1..12b6a91d62 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -213,8 +213,8 @@ cpu_tb_exec(CPUState *cpu, TranslationBlock *itb, int *tb_exit) TARGET_FMT_lx "] %s\n", last_tb->tc.ptr, last_tb->pc, lookup_symbol(last_tb->pc)); - if (cc->synchronize_from_tb) { - cc->synchronize_from_tb(cpu, last_tb); + if (cc->tcg_ops.synchronize_from_tb) { + cc->tcg_ops.synchronize_from_tb(cpu, last_tb); } else { assert(cc->set_pc); cc->set_pc(cpu, last_tb->pc); diff --git a/target/arm/cpu.c b/target/arm/cpu.c index fa4d4ba4eb..140cb33f07 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -54,6 +54,7 @@ static void arm_cpu_set_pc(CPUState *cs, vaddr value) } } +#ifdef CONFIG_TCG static void arm_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb) { @@ -70,6 +71,7 @@ static void arm_cpu_synchronize_from_tb(CPUState *cs, env->regs[15] = tb->pc; } } +#endif /* CONFIG_TCG */ static bool arm_cpu_has_work(CPUState *cs) { @@ -2257,7 +2259,6 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) cc->cpu_exec_interrupt = arm_cpu_exec_interrupt; cc->dump_state = arm_cpu_dump_state; cc->set_pc = arm_cpu_set_pc; - cc->synchronize_from_tb = arm_cpu_synchronize_from_tb; cc->gdb_read_register = arm_cpu_gdb_read_register; cc->gdb_write_register = arm_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY @@ -2277,6 +2278,7 @@ static void arm_cpu_class_init(ObjectClass *oc, void *data) cc->disas_set_info = arm_disas_set_info; #ifdef CONFIG_TCG cc->tcg_ops.initialize = arm_translate_init; + cc->tcg_ops.synchronize_from_tb = arm_cpu_synchronize_from_tb; cc->tlb_fill = arm_cpu_tlb_fill; cc->debug_excp_handler = arm_debug_excp_handler; cc->debug_check_watchpoint = arm_debug_check_watchpoint; diff --git a/target/avr/cpu.c b/target/avr/cpu.c index fb66695fbb..a82fa9d7a8 100644 --- a/target/avr/cpu.c +++ b/target/avr/cpu.c @@ -208,7 +208,7 @@ static void avr_cpu_class_init(ObjectClass *oc, void *data) cc->vmsd = &vms_avr_cpu; cc->disas_set_info = avr_cpu_disas_set_info; cc->tcg_ops.initialize = avr_cpu_tcg_init; - cc->synchronize_from_tb = avr_cpu_synchronize_from_tb; + cc->tcg_ops.synchronize_from_tb = avr_cpu_synchronize_from_tb; cc->gdb_read_register = avr_cpu_gdb_read_register; cc->gdb_write_register = avr_cpu_gdb_write_register; cc->gdb_num_core_regs = 35; diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 80e3081631..94ea3014a3 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -144,7 +144,7 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *data) cc->cpu_exec_interrupt = hppa_cpu_exec_interrupt; cc->dump_state = hppa_cpu_dump_state; cc->set_pc = hppa_cpu_set_pc; - cc->synchronize_from_tb = hppa_cpu_synchronize_from_tb; + cc->tcg_ops.synchronize_from_tb = hppa_cpu_synchronize_from_tb; cc->gdb_read_register = hppa_cpu_gdb_read_register; cc->gdb_write_register = hppa_cpu_gdb_write_register; cc->tlb_fill = hppa_cpu_tlb_fill; diff --git a/target/i386/tcg/tcg-cpu.c b/target/i386/tcg/tcg-cpu.c index d90502a0cc..874286de28 100644 --- a/target/i386/tcg/tcg-cpu.c +++ b/target/i386/tcg/tcg-cpu.c @@ -61,7 +61,7 @@ void tcg_cpu_common_class_init(CPUClass *cc) { cc->do_interrupt = x86_cpu_do_interrupt; cc->cpu_exec_interrupt = x86_cpu_exec_interrupt; - cc->synchronize_from_tb = x86_cpu_synchronize_from_tb; + cc->tcg_ops.synchronize_from_tb = x86_cpu_synchronize_from_tb; cc->cpu_exec_enter = x86_cpu_exec_enter; cc->cpu_exec_exit = x86_cpu_exec_exit; cc->tcg_ops.initialize = tcg_x86_init; diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index f2978ca726..e40d1db88d 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -369,7 +369,7 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data) cc->cpu_exec_interrupt = mb_cpu_exec_interrupt; cc->dump_state = mb_cpu_dump_state; cc->set_pc = mb_cpu_set_pc; - cc->synchronize_from_tb = mb_cpu_synchronize_from_tb; + cc->tcg_ops.synchronize_from_tb = mb_cpu_synchronize_from_tb; cc->gdb_read_register = mb_cpu_gdb_read_register; cc->gdb_write_register = mb_cpu_gdb_write_register; cc->tlb_fill = mb_cpu_tlb_fill; diff --git a/target/mips/cpu.c b/target/mips/cpu.c index b96c3d5969..350f1c66c7 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -257,6 +257,7 @@ static void mips_cpu_set_pc(CPUState *cs, vaddr value) } } +#ifdef CONFIG_TCG static void mips_cpu_synchronize_from_tb(CPUState *cs, const TranslationBlock *tb) { @@ -267,6 +268,7 @@ static void mips_cpu_synchronize_from_tb(CPUState *cs, env->hflags &= ~MIPS_HFLAG_BMASK; env->hflags |= tb->flags & MIPS_HFLAG_BMASK; } +#endif /* CONFIG_TCG */ static bool mips_cpu_has_work(CPUState *cs) { @@ -678,7 +680,6 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) cc->cpu_exec_interrupt = mips_cpu_exec_interrupt; cc->dump_state = mips_cpu_dump_state; cc->set_pc = mips_cpu_set_pc; - cc->synchronize_from_tb = mips_cpu_synchronize_from_tb; cc->gdb_read_register = mips_cpu_gdb_read_register; cc->gdb_write_register = mips_cpu_gdb_write_register; #ifndef CONFIG_USER_ONLY @@ -690,6 +691,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *data) cc->disas_set_info = mips_cpu_disas_set_info; #ifdef CONFIG_TCG cc->tcg_ops.initialize = mips_tcg_init; + cc->tcg_ops.synchronize_from_tb = mips_cpu_synchronize_from_tb; cc->tlb_fill = mips_cpu_tlb_fill; #endif diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 60d0b43153..1e9bd3c313 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -597,7 +597,7 @@ static void riscv_cpu_class_init(ObjectClass *c, void *data) cc->cpu_exec_interrupt = riscv_cpu_exec_interrupt; cc->dump_state = riscv_cpu_dump_state; cc->set_pc = riscv_cpu_set_pc; - cc->synchronize_from_tb = riscv_cpu_synchronize_from_tb; + cc->tcg_ops.synchronize_from_tb = riscv_cpu_synchronize_from_tb; cc->gdb_read_register = riscv_cpu_gdb_read_register; cc->gdb_write_register = riscv_cpu_gdb_write_register; cc->gdb_num_core_regs = 33; diff --git a/target/rx/cpu.c b/target/rx/cpu.c index cdcab49c8a..4e0de14eef 100644 --- a/target/rx/cpu.c +++ b/target/rx/cpu.c @@ -190,7 +190,7 @@ static void rx_cpu_class_init(ObjectClass *klass, void *data) cc->cpu_exec_interrupt = rx_cpu_exec_interrupt; cc->dump_state = rx_cpu_dump_state; cc->set_pc = rx_cpu_set_pc; - cc->synchronize_from_tb = rx_cpu_synchronize_from_tb; + cc->tcg_ops.synchronize_from_tb = rx_cpu_synchronize_from_tb; cc->gdb_read_register = rx_cpu_gdb_read_register; cc->gdb_write_register = rx_cpu_gdb_write_register; cc->get_phys_page_debug = rx_cpu_get_phys_page_debug; diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index b86753cda5..130debe074 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -223,7 +223,7 @@ static void superh_cpu_class_init(ObjectClass *oc, void *data) cc->cpu_exec_interrupt = superh_cpu_exec_interrupt; cc->dump_state = superh_cpu_dump_state; cc->set_pc = superh_cpu_set_pc; - cc->synchronize_from_tb = superh_cpu_synchronize_from_tb; + cc->tcg_ops.synchronize_from_tb = superh_cpu_synchronize_from_tb; cc->gdb_read_register = superh_cpu_gdb_read_register; cc->gdb_write_register = superh_cpu_gdb_write_register; cc->tlb_fill = superh_cpu_tlb_fill; diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 3ab71e9d00..0ae38eb496 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -870,7 +870,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void *data) cc->memory_rw_debug = sparc_cpu_memory_rw_debug; #endif cc->set_pc = sparc_cpu_set_pc; - cc->synchronize_from_tb = sparc_cpu_synchronize_from_tb; + cc->tcg_ops.synchronize_from_tb = sparc_cpu_synchronize_from_tb; cc->gdb_read_register = sparc_cpu_gdb_read_register; cc->gdb_write_register = sparc_cpu_gdb_write_register; cc->tlb_fill = sparc_cpu_tlb_fill; diff --git a/target/tricore/cpu.c b/target/tricore/cpu.c index bf135af40f..09cc6a0e62 100644 --- a/target/tricore/cpu.c +++ b/target/tricore/cpu.c @@ -162,7 +162,7 @@ static void tricore_cpu_class_init(ObjectClass *c, void *data) cc->dump_state = tricore_cpu_dump_state; cc->set_pc = tricore_cpu_set_pc; - cc->synchronize_from_tb = tricore_cpu_synchronize_from_tb; + cc->tcg_ops.synchronize_from_tb = tricore_cpu_synchronize_from_tb; cc->get_phys_page_debug = tricore_cpu_get_phys_page_debug; cc->tcg_ops.initialize = tricore_tcg_init; cc->tlb_fill = tricore_cpu_tlb_fill;