| Message ID | 20201216162744.895920-6-f4bug@amsat.org |
|---|---|
| State | New |
| Headers | show |
| Series | target/mips/mips-defs: Simplify ISA definitions | expand |
On 12/16/20 10:27 AM, Philippe Mathieu-Daudé wrote: > Use the single ISA_MIPS32R3 definition to check if the Release 3 > ISA is supported, whether the CPU support 32/64-bit. > > For now we keep '32' in the definition name, we will rename it > as ISA_MIPS_R3 in few commits. > > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > --- > target/mips/mips-defs.h | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/target/mips/mips-defs.h b/target/mips/mips-defs.h index 9cfa4c346bf..0d906ca64b3 100644 --- a/target/mips/mips-defs.h +++ b/target/mips/mips-defs.h @@ -25,7 +25,6 @@ #define ISA_MIPS32 0x0000000000000020ULL #define ISA_MIPS32R2 0x0000000000000040ULL #define ISA_MIPS32R3 0x0000000000000200ULL -#define ISA_MIPS64R3 0x0000000000000400ULL #define ISA_MIPS32R5 0x0000000000000800ULL #define ISA_MIPS64R5 0x0000000000001000ULL #define ISA_MIPS32R6 0x0000000000002000ULL @@ -84,7 +83,7 @@ /* MIPS Technologies "Release 3" */ #define CPU_MIPS32R3 (CPU_MIPS32R2 | ISA_MIPS32R3) -#define CPU_MIPS64R3 (CPU_MIPS64R2 | CPU_MIPS32R3 | ISA_MIPS64R3) +#define CPU_MIPS64R3 (CPU_MIPS64R2 | CPU_MIPS32R3) /* MIPS Technologies "Release 5" */ #define CPU_MIPS32R5 (CPU_MIPS32R3 | ISA_MIPS32R5)
Use the single ISA_MIPS32R3 definition to check if the Release 3 ISA is supported, whether the CPU support 32/64-bit. For now we keep '32' in the definition name, we will rename it as ISA_MIPS_R3 in few commits. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- target/mips/mips-defs.h | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-)