Message ID | 20201204222622.2743175-4-f4bug@amsat.org |
---|---|
State | New |
Headers | show |
Series | mips: Sanitize Multi-Threading ASE | expand |
On 12/4/20 4:26 PM, Philippe Mathieu-Daudé wrote: > Do not initialize MT-related config registers if the MT ASE > is not present. As some functions access the 'mvp' structure, > we still zero-allocate it. > > Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> > --- > target/mips/translate_init.c.inc | 4 ++++ > 1 file changed, 4 insertions(+) Reviewed-by: Richard Henderson <richard.henderson@linaro.org> r~
diff --git a/target/mips/translate_init.c.inc b/target/mips/translate_init.c.inc index 5a926bc6df3..f72fee3b40a 100644 --- a/target/mips/translate_init.c.inc +++ b/target/mips/translate_init.c.inc @@ -993,6 +993,10 @@ static void mvp_init(CPUMIPSState *env) { env->mvp = g_malloc0(sizeof(CPUMIPSMVPContext)); + if (!ase_mt_available(env)) { + return; + } + /* MVPConf1 implemented, TLB sharable, no gating storage support, programmable cache partitioning implemented, number of allocatable and shareable TLB entries, MVP has allocatable TCs, 2 VPEs
Do not initialize MT-related config registers if the MT ASE is not present. As some functions access the 'mvp' structure, we still zero-allocate it. Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> --- target/mips/translate_init.c.inc | 4 ++++ 1 file changed, 4 insertions(+)