@@ -518,6 +518,7 @@ static bool trans_VLD_all_lanes(DisasContext *s, arg_VLD_all_lanes *a)
int reg, stride, vec_size;
int vd = a->vd;
int size = a->size;
+ MemOp mop = size | s->be_data | (a->a ? MO_ALIGN : 0);
int nregs = a->n + 1;
TCGv_i32 addr, tmp;
@@ -559,8 +560,7 @@ static bool trans_VLD_all_lanes(DisasContext *s, arg_VLD_all_lanes *a)
addr = tcg_temp_new_i32();
load_reg_var(s, addr, a->rn);
for (reg = 0; reg < nregs; reg++) {
- gen_aa32_ld_i32(s, tmp, addr, get_mem_index(s),
- s->be_data | size);
+ gen_aa32_ld_i32(s, tmp, addr, get_mem_index(s), mop);
if ((vd & 1) && vec_size == 16) {
/*
* We cannot write 16 bytes at once because the
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- target/arm/translate-neon.c.inc | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)