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[83.42.66.234]) by smtp.gmail.com with ESMTPSA id h17sm8131107wrp.54.2020.11.20.13.10.52 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Fri, 20 Nov 2020 13:10:53 -0800 (PST) From: =?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= To: qemu-devel@nongnu.org Subject: [PATCH 24/26] MAINTAINERS: Add entry for MIPS Loongson TCG Date: Fri, 20 Nov 2020 22:08:42 +0100 Message-Id: <20201120210844.2625602-25-f4bug@amsat.org> X-Mailer: git-send-email 2.26.2 In-Reply-To: <20201120210844.2625602-1-f4bug@amsat.org> References: <20201120210844.2625602-1-f4bug@amsat.org> MIME-Version: 1.0 Received-SPF: pass client-ip=2a00:1450:4864:20::343; envelope-from=philippe.mathieu.daude@gmail.com; helo=mail-wm1-x343.google.com X-Spam_score_int: -14 X-Spam_score: -1.5 X-Spam_bar: - X-Spam_report: (-1.5 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_EF=-0.1, FREEMAIL_FORGED_FROMDOMAIN=0.249, FREEMAIL_FROM=0.001, HEADER_FROM_DIFFERENT_DOMAINS=0.249, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=no autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fredrik Noring , Craig Janeczek , Richard Henderson , =?utf-8?q?Philippe_Mathie?= =?utf-8?q?u-Daud=C3=A9?= , Laurent Vivier , Paolo Bonzini , Huacai Chen , Aleksandar Rikalo , Aurelien Jarno Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" Add an entry for the TCG core related to Loongson. Signed-off-by: Philippe Mathieu-Daudé --- Adding Huacai and Jiaxun in case they want to be notified of changes, patch conditional to their individual approval. --- MAINTAINERS | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index ce7fe949036..be42b56300f 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -240,6 +240,13 @@ F: include/hw/timer/mips_gictimer.h F: tests/tcg/mips/ K: ^Subject:.*(?i)mips +MIPS TCG CPUs (Loongson) +M: Philippe Mathieu-Daudé +R: Huacai Chen +R: Jiaxun Yang +S: Odd Fixes +F: target/mips/vendor-loong* + MIPS TCG CPUs (nanoMIPS ISA) S: Orphan F: disas/nanomips.*