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[PULL,8/9] hw/misc/tmp105: reset the T_low and T_High registers

Message ID 20201117134834.31731-9-peter.maydell@linaro.org
State New
Headers show
Series [PULL,1/9] hw/arm/virt: ARM_VIRT must select ARM_GIC | expand

Commit Message

Peter Maydell Nov. 17, 2020, 1:48 p.m. UTC 
The TMP105 datasheet (https://www.ti.com/lit/gpn/tmp105) says that the
power-up reset values for the T_low and T_high registers are 80 degrees C
and 75 degrees C, which are 0x500 and 0x4B0 hex according to table 5.  These
values are then shifted right by four bits to give the register reset
values, since both registers store the 12 bits of temperature data in bits
[15..4] of a 16 bit register.

We were resetting these registers to zero, which is problematic for Linux
guests which enable the alert interrupt and then immediately take an
unexpected overtemperature alert because the current temperature is above
freezing...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-id: 20201110150023.25533-2-peter.maydell@linaro.org
---
 hw/misc/tmp105.c | 3 +++
 1 file changed, 3 insertions(+)
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Patch

diff --git a/hw/misc/tmp105.c b/hw/misc/tmp105.c
index b47120492ab..0a4aad4854e 100644
--- a/hw/misc/tmp105.c
+++ b/hw/misc/tmp105.c
@@ -225,6 +225,9 @@  static void tmp105_reset(I2CSlave *i2c)
     s->faults = tmp105_faultq[(s->config >> 3) & 3];
     s->alarm = 0;
 
+    s->limit[0] = 0x4b00; /* T_LOW, 75 degrees C */
+    s->limit[1] = 0x5000; /* T_HIGH, 80 degrees C */
+
     tmp105_interrupt_update(s);
 }