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[1/2] acpi/crs: Prevent bad ranges for host bridges

Message ID 20201026193924.985014-1-ben.widawsky@intel.com
State New
Headers show
Series [1/2] acpi/crs: Prevent bad ranges for host bridges | expand

Commit Message

Ben Widawsky Oct. 26, 2020, 7:39 p.m. UTC
Prevent _CRS resources being quietly chopped off and instead throw an
assertion. _CRS is used by host bridges to declare regions of io and/or
memory that they consume. On some (all?) platforms the host bridge
doesn't have PCI header space and so they need some way to convey the
information.

Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>

---

1. I'm not aware of this being a real issue on platforms today as I think
   many platforms that use ACPI and actually have regions, constrain to
   32b to be complaint with legacy.
2. Since host bridges aren't usually hot plugged, it can't be invoked by
   a user, so assert() seems like the right way to handle this.
---
 hw/i386/acpi-build.c | 2 ++
 1 file changed, 2 insertions(+)

Comments

Igor Mammedov Oct. 29, 2020, 1:59 p.m. UTC | #1
On Mon, 26 Oct 2020 12:39:23 -0700
Ben Widawsky <ben.widawsky@intel.com> wrote:

> Prevent _CRS resources being quietly chopped off and instead throw an
> assertion. _CRS is used by host bridges to declare regions of io and/or
> memory that they consume. On some (all?) platforms the host bridge
> doesn't have PCI header space and so they need some way to convey the
> information.
> 
> Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>

Acked-by: Igor Mammedov <imammedo@redhat.com>

> ---
> 
> 1. I'm not aware of this being a real issue on platforms today as I think
>    many platforms that use ACPI and actually have regions, constrain to
>    32b to be complaint with legacy.
> 2. Since host bridges aren't usually hot plugged, it can't be invoked by
>    a user, so assert() seems like the right way to handle this.
> ---
>  hw/i386/acpi-build.c | 2 ++
>  1 file changed, 2 insertions(+)
> 
> diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
> index eee7b57c37..df13abecf4 100644
> --- a/hw/i386/acpi-build.c
> +++ b/hw/i386/acpi-build.c
> @@ -869,6 +869,8 @@ static Aml *build_crs(PCIHostState *host, CrsRangeSet *range_set)
>      crs_range_merge(temp_range_set.mem_ranges);
>      for (i = 0; i < temp_range_set.mem_ranges->len; i++) {
>          entry = g_ptr_array_index(temp_range_set.mem_ranges, i);
> +        assert(entry->limit <= UINT32_MAX &&
> +               (entry->limit - entry->base + 1) <= UINT32_MAX);
>          aml_append(crs,
>                     aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED,
>                                      AML_MAX_FIXED, AML_NON_CACHEABLE,
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Patch

diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index eee7b57c37..df13abecf4 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -869,6 +869,8 @@  static Aml *build_crs(PCIHostState *host, CrsRangeSet *range_set)
     crs_range_merge(temp_range_set.mem_ranges);
     for (i = 0; i < temp_range_set.mem_ranges->len; i++) {
         entry = g_ptr_array_index(temp_range_set.mem_ranges, i);
+        assert(entry->limit <= UINT32_MAX &&
+               (entry->limit - entry->base + 1) <= UINT32_MAX);
         aml_append(crs,
                    aml_dword_memory(AML_POS_DECODE, AML_MIN_FIXED,
                                     AML_MAX_FIXED, AML_NON_CACHEABLE,