| Message ID | 20200901183452.24967-3-deller@gmx.de |
|---|---|
| State | New |
| Headers | show |
| Series | hppa power button support, graphics updates and firmware fixes | expand |
On 9/1/20 11:34 AM, Helge Deller wrote: > diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c > index 90aeefe2a4..e9d84d0f03 100644 > --- a/hw/hppa/machine.c > +++ b/hw/hppa/machine.c > @@ -72,6 +72,14 @@ static FWCfgState *create_fw_cfg(MachineState *ms) > fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version", > g_memdup(&val, sizeof(val)), sizeof(val)); > > + val = cpu_to_le64(HPPA_TLB_ENTRIES); I guess you don't have a cpu structure here against which you could apply ARRAY_SIZE? > /* ??? The number of entries isn't specified by the architecture. */ > + #define HPPA_TLB_ENTRIES 256 > + #define HPPA_BTLB_ENTRIES 0 What's a btlb entry? The indented defines are weird. r~
On 01.09.20 23:36, Richard Henderson wrote: > On 9/1/20 11:34 AM, Helge Deller wrote: >> diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c >> index 90aeefe2a4..e9d84d0f03 100644 >> --- a/hw/hppa/machine.c >> +++ b/hw/hppa/machine.c >> @@ -72,6 +72,14 @@ static FWCfgState *create_fw_cfg(MachineState *ms) >> fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version", >> g_memdup(&val, sizeof(val)), sizeof(val)); >> >> + val = cpu_to_le64(HPPA_TLB_ENTRIES); > > I guess you don't have a cpu structure here against which you could apply > ARRAY_SIZE? You mean to calculate the number of TLB entries based on the static size of an array, e.g. ARRAY_SIZE(struct CPUHPPAState.tlb[256]) ? I've replaced it intentionally by a constant, because in a follow-up patch to improve the TLB-lookup speed, the array gets replaced by a GTree. You can see a working version of the patch here: https://github.com/hdeller/qemu-hppa/commit/644790132b91cdb835c8dd38198e6f6ed0b533a1 In this patch: - hppa_tlb_entry tlb[HPPA_TLB_ENTRIES]; + GTree *tlb; + GList *tlb_list; + int tlb_entries; >> /* ??? The number of entries isn't specified by the architecture. */ >> + #define HPPA_TLB_ENTRIES 256 >> + #define HPPA_BTLB_ENTRIES 0 > > The indented defines are weird. How/Why? > What's a btlb entry? Block-TLB entries. Most PA1.1-machines have 16 such BTLBs which can address a range of 4k pages with a single entry. In a follow-up qemu patch it makes sense to add those TLBs. Helge
On 9/2/20 4:16 AM, Helge Deller wrote: >>> + val = cpu_to_le64(HPPA_TLB_ENTRIES); >> >> I guess you don't have a cpu structure here against which you could apply >> ARRAY_SIZE? > > You mean to calculate the number of TLB entries based on the static size > of an array, e.g. ARRAY_SIZE(struct CPUHPPAState.tlb[256]) ? > I've replaced it intentionally by a constant, because in a follow-up > patch to improve the TLB-lookup speed, the array gets replaced by a GTree. Ok. >> The indented defines are weird. > > How/Why? Because usually the # is at column 1. r~
On 02.09.20 18:52, Richard Henderson wrote: > On 9/2/20 4:16 AM, Helge Deller wrote: >>>> + val = cpu_to_le64(HPPA_TLB_ENTRIES); >>> >>> I guess you don't have a cpu structure here against which you could apply >>> ARRAY_SIZE? >> >> You mean to calculate the number of TLB entries based on the static size >> of an array, e.g. ARRAY_SIZE(struct CPUHPPAState.tlb[256]) ? >> I've replaced it intentionally by a constant, because in a follow-up >> patch to improve the TLB-lookup speed, the array gets replaced by a GTree. > > Ok. > >>> The indented defines are weird. >> >> How/Why? > > Because usually the # is at column 1. I fixed that up in the last v3 version I just sent. Helge
diff --git a/hw/hppa/machine.c b/hw/hppa/machine.c index 90aeefe2a4..e9d84d0f03 100644 --- a/hw/hppa/machine.c +++ b/hw/hppa/machine.c @@ -72,6 +72,14 @@ static FWCfgState *create_fw_cfg(MachineState *ms) fw_cfg_add_file(fw_cfg, "/etc/firmware-min-version", g_memdup(&val, sizeof(val)), sizeof(val)); + val = cpu_to_le64(HPPA_TLB_ENTRIES); + fw_cfg_add_file(fw_cfg, "/etc/cpu/tlb_entries", + g_memdup(&val, sizeof(val)), sizeof(val)); + + val = cpu_to_le64(HPPA_BTLB_ENTRIES); + fw_cfg_add_file(fw_cfg, "/etc/cpu/btlb_entries", + g_memdup(&val, sizeof(val)), sizeof(val)); + return fw_cfg; } diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 801a4fb1ba..440104dc3c 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -196,9 +196,12 @@ struct CPUHPPAState { target_ureg shadow[7]; /* shadow registers */ /* ??? The number of entries isn't specified by the architecture. */ + #define HPPA_TLB_ENTRIES 256 + #define HPPA_BTLB_ENTRIES 0 + /* ??? Implement a unified itlb/dtlb for the moment. */ /* ??? We should use a more intelligent data structure. */ - hppa_tlb_entry tlb[256]; + hppa_tlb_entry tlb[HPPA_TLB_ENTRIES]; uint32_t tlb_last; };
Until now the TLB size was fixed at 256 entries. To allow operating systems to utilize more TLB entries in the future, we need to tell firmware how many TLB entries we actually support in the emulation. Firmware then reports this to the operating system via the PDC_CACHE_INFO call. This patch simply does the preparation to allow more TLB entries. Signed-off-by: Helge Deller <deller@gmx.de> --- hw/hppa/machine.c | 8 ++++++++ target/hppa/cpu.h | 5 ++++- 2 files changed, 12 insertions(+), 1 deletion(-) -- 2.21.3