@@ -51,6 +51,7 @@ typedef struct SpaprXive {
VMChangeStateEntry *change;
uint8_t hv_prio;
+ bool hw_storeeoi;
} SpaprXive;
typedef struct SpaprXiveClass {
@@ -596,6 +596,7 @@ static Property spapr_xive_properties[] = {
DEFINE_PROP_UINT64("vc-base", SpaprXive, vc_base, SPAPR_XIVE_VC_BASE),
DEFINE_PROP_UINT64("tm-base", SpaprXive, tm_base, SPAPR_XIVE_TM_BASE),
DEFINE_PROP_UINT8("hv-prio", SpaprXive, hv_prio, 7),
+ DEFINE_PROP_BOOL("hw-storeeoi", SpaprXive, hw_storeeoi, false),
DEFINE_PROP_END_OF_LIST(),
};
@@ -945,7 +946,7 @@ static target_ulong h_int_get_source_info(PowerPCCPU *cpu,
/*
* Override QEMU settings with KVM values
*/
- if (flags & XIVE_SRC_STORE_EOI) {
+ if (xive->hw_storeeoi && flags & XIVE_SRC_STORE_EOI) {
args[0] |= SPAPR_XIVE_SRC_STORE_EOI;
} else {
args[0] &= ~SPAPR_XIVE_SRC_STORE_EOI;
@@ -199,6 +199,23 @@ static int spapr_irq_check(SpaprMachineState *spapr, Error **errp)
return 0;
}
+static bool spapr_irq_xive_hw_storeeoi(SpaprMachineState *spapr)
+{
+ MachineState *machine = MACHINE(spapr);
+
+ /*
+ * All P10 compat kernels should enforce load-after-store ordering
+ * for StoreEOI.
+ */
+ if (ppc_type_check_compat(machine->cpu_type, CPU_POWERPC_LOGICAL_3_10,
+ 0, spapr->max_compat_pvr)) {
+ return true;
+ }
+
+ /* StoreEOI on P9 compat is unsafe */
+ return false;
+}
+
/*
* sPAPR IRQ frontend routines for devices
*/
@@ -325,6 +342,7 @@ void spapr_irq_init(SpaprMachineState *spapr, Error **errp)
if (spapr->irq->xive) {
uint32_t nr_servers = spapr_max_server_number(spapr);
+ bool storeeoi = spapr_irq_xive_hw_storeeoi(spapr);
DeviceState *dev;
int i;
@@ -337,6 +355,8 @@ void spapr_irq_init(SpaprMachineState *spapr, Error **errp)
qdev_prop_set_uint32(dev, "nr-ends", nr_servers << 3);
object_property_set_link(OBJECT(dev), "xive-fabric", OBJECT(spapr),
&error_abort);
+ object_property_set_bool(OBJECT(dev), "hw-storeeoi", storeeoi,
+ &error_abort);
sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal);
spapr->xive = SPAPR_XIVE(dev);
The StoreEOI features is safe to use with a P10 compat machine but not with P9 compat, as it can not be migrated to a P9 host. Introdude a "hw-storeeoi" property in the SpaprXive model to check for the availability of StoreEOI at the HW level when a kernel IRQ chip is in use. XIVE emulated is not impacted. Signed-off-by: Cédric Le Goater <clg@kaod.org> --- include/hw/ppc/spapr_xive.h | 1 + hw/intc/spapr_xive.c | 3 ++- hw/ppc/spapr_irq.c | 20 ++++++++++++++++++++ 3 files changed, 23 insertions(+), 1 deletion(-)