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(virtlab701.virt.lab.eng.bos.redhat.com [10.19.152.228]) by smtp.corp.redhat.com (Postfix) with ESMTP id 398C9165D8; Tue, 18 Aug 2020 14:11:39 +0000 (UTC) From: Paolo Bonzini To: qemu-devel@nongnu.org Subject: [PULL 083/150] meson: convert disas directory to Meson Date: Tue, 18 Aug 2020 10:09:18 -0400 Message-Id: <20200818141025.21608-84-pbonzini@redhat.com> In-Reply-To: <20200818141025.21608-1-pbonzini@redhat.com> References: <20200818141025.21608-1-pbonzini@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.84 on 10.5.11.23 Authentication-Results: relay.mimecast.com; auth=pass smtp.auth=CUSA124A263 smtp.mailfrom=pbonzini@redhat.com X-Mimecast-Spam-Score: 0.002 X-Mimecast-Originator: redhat.com Received-SPF: pass client-ip=207.211.31.81; envelope-from=pbonzini@redhat.com; helo=us-smtp-delivery-1.mimecast.com X-detected-operating-system: by eggs.gnu.org: First seen = 2020/08/18 08:01:06 X-ACL-Warn: Detected OS = Linux 2.2.x-3.x [generic] [fuzzy] X-Spam_score_int: -40 X-Spam_score: -4.1 X-Spam_bar: ---- X-Spam_report: (-4.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-1, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H2=-1, SPF_HELO_NONE=0.001, SPF_PASS=-0.001, URIBL_BLOCKED=0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?utf-8?q?Marc-Andr=C3=A9_Lureau?= Errors-To: qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org Sender: "Qemu-devel" From: Marc-André Lureau Signed-off-by: Marc-André Lureau Signed-off-by: Paolo Bonzini --- Makefile.objs | 2 -- disas/Makefile.objs | 30 ------------------------------ disas/libvixl/Makefile.objs | 5 ----- disas/libvixl/meson.build | 7 +++++++ disas/meson.build | 27 +++++++++++++++++++++++++++ meson.build | 1 + 6 files changed, 35 insertions(+), 37 deletions(-) delete mode 100644 disas/Makefile.objs delete mode 100644 disas/libvixl/Makefile.objs create mode 100644 disas/libvixl/meson.build create mode 100644 disas/meson.build diff --git a/Makefile.objs b/Makefile.objs index 7158031c0c..3b32a4c9bb 100644 --- a/Makefile.objs +++ b/Makefile.objs @@ -74,8 +74,6 @@ endif # CONFIG_SOFTMMU # Target-independent parts used in system and user emulation common-obj-y += hw/ -common-obj-y += qom/ -common-obj-y += disas/ ###################################################################### # Resource file for Windows executables diff --git a/disas/Makefile.objs b/disas/Makefile.objs deleted file mode 100644 index 3c1cdce026..0000000000 --- a/disas/Makefile.objs +++ /dev/null @@ -1,30 +0,0 @@ - -common-obj-$(CONFIG_ALPHA_DIS) += alpha.o -common-obj-$(CONFIG_ARM_DIS) += arm.o -common-obj-$(CONFIG_ARM_A64_DIS) += arm-a64.o -common-obj-$(CONFIG_ARM_A64_DIS) += libvixl/ -libvixldir = $(SRC_PATH)/disas/libvixl -# The -Wno-sign-compare is needed only for gcc 4.6, which complains about -# some signed-unsigned equality comparisons in libvixl which later gcc -# versions do not. -arm-a64.o-cflags := -I$(libvixldir) -Wno-sign-compare -common-obj-$(CONFIG_CRIS_DIS) += cris.o -common-obj-$(CONFIG_HPPA_DIS) += hppa.o -common-obj-$(CONFIG_I386_DIS) += i386.o -common-obj-$(CONFIG_M68K_DIS) += m68k.o -common-obj-$(CONFIG_MICROBLAZE_DIS) += microblaze.o -common-obj-$(CONFIG_MIPS_DIS) += mips.o -common-obj-$(CONFIG_NANOMIPS_DIS) += nanomips.o -common-obj-$(CONFIG_NIOS2_DIS) += nios2.o -common-obj-$(CONFIG_MOXIE_DIS) += moxie.o -common-obj-$(CONFIG_PPC_DIS) += ppc.o -common-obj-$(CONFIG_RISCV_DIS) += riscv.o -common-obj-$(CONFIG_S390_DIS) += s390.o -common-obj-$(CONFIG_SH4_DIS) += sh4.o -common-obj-$(CONFIG_SPARC_DIS) += sparc.o -common-obj-$(CONFIG_LM32_DIS) += lm32.o -common-obj-$(CONFIG_XTENSA_DIS) += xtensa.o - -# TODO: As long as the TCG interpreter and its generated code depend -# on the QEMU target, we cannot compile the disassembler here. -#common-obj-$(CONFIG_TCI_DIS) += tci.o diff --git a/disas/libvixl/Makefile.objs b/disas/libvixl/Makefile.objs deleted file mode 100644 index 99a637f6a0..0000000000 --- a/disas/libvixl/Makefile.objs +++ /dev/null @@ -1,5 +0,0 @@ -common-obj-$(CONFIG_ARM_A64_DIS) = vixl/utils.o \ - vixl/compiler-intrinsics.o \ - vixl/a64/instructions-a64.o \ - vixl/a64/decoder-a64.o \ - vixl/a64/disasm-a64.o diff --git a/disas/libvixl/meson.build b/disas/libvixl/meson.build new file mode 100644 index 0000000000..5e2eb33e8e --- /dev/null +++ b/disas/libvixl/meson.build @@ -0,0 +1,7 @@ +libvixl_ss.add(files( + 'vixl/a64/decoder-a64.cc', + 'vixl/a64/disasm-a64.cc', + 'vixl/a64/instructions-a64.cc', + 'vixl/compiler-intrinsics.cc', + 'vixl/utils.cc', +)) diff --git a/disas/meson.build b/disas/meson.build new file mode 100644 index 0000000000..0527d69128 --- /dev/null +++ b/disas/meson.build @@ -0,0 +1,27 @@ +libvixl_ss = ss.source_set() +subdir('libvixl') + +common_ss.add(when: 'CONFIG_ALPHA_DIS', if_true: files('alpha.c')) +common_ss.add(when: 'CONFIG_ARM_A64_DIS', if_true: files('arm-a64.cc')) +common_ss.add_all(when: 'CONFIG_ARM_A64_DIS', if_true: libvixl_ss) +common_ss.add(when: 'CONFIG_ARM_DIS', if_true: files('arm.c')) +common_ss.add(when: 'CONFIG_CRIS_DIS', if_true: files('cris.c')) +common_ss.add(when: 'CONFIG_HPPA_DIS', if_true: files('hppa.c')) +common_ss.add(when: 'CONFIG_I386_DIS', if_true: files('i386.c')) +common_ss.add(when: 'CONFIG_LM32_DIS', if_true: files('lm32.c')) +common_ss.add(when: 'CONFIG_M68K_DIS', if_true: files('m68k.c')) +common_ss.add(when: 'CONFIG_MICROBLAZE_DIS', if_true: files('microblaze.c')) +common_ss.add(when: 'CONFIG_MIPS_DIS', if_true: files('mips.c')) +common_ss.add(when: 'CONFIG_MOXIE_DIS', if_true: files('moxie.c')) +common_ss.add(when: 'CONFIG_NANOMIPS_DIS', if_true: files('nanomips.cpp')) +common_ss.add(when: 'CONFIG_NIOS2_DIS', if_true: files('nios2.c')) +common_ss.add(when: 'CONFIG_PPC_DIS', if_true: files('ppc.c')) +common_ss.add(when: 'CONFIG_RISCV_DIS', if_true: files('riscv.c')) +common_ss.add(when: 'CONFIG_S390_DIS', if_true: files('s390.c')) +common_ss.add(when: 'CONFIG_SH4_DIS', if_true: files('sh4.c')) +common_ss.add(when: 'CONFIG_SPARC_DIS', if_true: files('sparc.c')) +common_ss.add(when: 'CONFIG_XTENSA_DIS', if_true: files('xtensa.c')) + +# TODO: As long as the TCG interpreter and its generated code depend +# on the QEMU target, we cannot compile the disassembler here. +#common_ss.add(when: 'CONFIG_TCI_DIS', if_true: files('tci.c')) diff --git a/meson.build b/meson.build index 99360baccd..bc3ff81567 100644 --- a/meson.build +++ b/meson.build @@ -670,6 +670,7 @@ common_ss.add(files('cpus-common.c')) subdir('softmmu') subdir('backends') +subdir('disas') subdir('migration') subdir('monitor') subdir('net')